S. Manich, A. Gabarro, J. Figueras, P. Girard, L. Guiller, C.Landrault, S. Pravassoudovitch, J. P. Teixeira, and M. Santos. Low-PowerBIST by Filtering Non-Detecting Vectors. accepted for publication in Journal of Electronic Testing, Theory and Application (JETTA), 15, 2000.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....ordering assumes a high correlation between switching activity in the circuit under test and the hamming distance [56, 72] or transition density [69] at circuit primary inputs. For combinational circuits employing BIST several techniques for minimising power dissipation were proposed recently [22, 44, 45, 68, 70, 119, 120, 121, 190, 197, 198]. In [190] the use of dual speed linear feedback shift register (DS LFSR) lowers the transition density at the circuit inputs leading to minimised power dissipation. The DS LFSR operates with a slow and a normal speed LFSR, as shown in Figure 2.5, in order to increase the correlation between ....

....during test application [68] test sequence was proposed in [68, 70] A sub sequence is non detecting if all the faults found by it are also observed by other detecting sub sequences from the pseudorandom test sequence. An enhancement of the test vector inhibiting technique was presented in [70, 119, 120, 121] where all the non detecting sub sequences are filtered. The basic principle of filtering non detecting sequences is to use decoding logic to detect the first and the last vectors of each non detecting sequence as shown in Figure 2.6(a) After the CUT LFSR MASK p enable logic Figure 2.7: ....

S. Manich, A. Gabarro, M. Lopez, J. Figueras, P. Girard, L. Guiller, C. Landrault, S. Pravossoudovitch, P. Teixeira, and M. Santos. Low power BIST by filtering nondetecting vectors. Journal of Electronic Testing: Theory and Applications (JETTA), 16(3):193--202, June 2000.

....ordering assumes a high correlation between switching activity in the circuit under test and the hamming distance [56, 72] or transition density [69] at circuit primary inputs. For combinational circuits employing BIST several techniques for minimising power dissipation were proposed recently [22, 44, 45, 68, 70, 119, 120, 121, 190, 197, 198]. In [190] the use of dual speed linear feedback shift register (DS LFSR) lowers the transition density at the circuit inputs leading to minimised power dissipation. The DS LFSR operates with a slow and a normal speed LFSR, as shown in Figure 2.5, in order to increase the correlation between ....

....during test application [68] test sequence was proposed in [68, 70] A sub sequence is non detecting if all the faults found by it are also observed by other detecting sub sequences from the pseudorandom test sequence. An enhancement of the test vector inhibiting technique was presented in [70, 119, 120, 121] where all the non detecting sub sequences are filtered. The basic principle of filtering non detecting sequences is to use decoding logic to detect the first and the last vectors of each non detecting sequence as shown in Figure 2.6(a) After the CUT LFSR MASK p enable logic Figure 2.7: ....

S. Manich, A. Gabarro, M. Lopez, J. Figueras, P. Girard, L. Guiller, C. Landrault, S. Pravossoudovitch, P. Teixeira, and M. Santos. Low power BIST by filtering non-detecting vectors. In IEEE European Test Workshop (ETW99), pages 165-- 170, 1999.

....gates since it yields lowest power dissipation by itself. A mixed solution based on reseeding LFSRs and test vector inhibiting to filter few non detecting subsequences of a pseudorandom test sequence has been proposed in [20] An enhancement of test vector inhibiting technique has been proposed in [21] where all the non detecting subsequences are filtered. A different approach for filtering non detecting vectors inspired by the precomputation architecture is presented in [22] An improvement in area overhead associated with filtering non detecting vectors without penalty in fault coverage or ....

S. Manich, A. Gabarro, M. Lopez, J. Figueras, P. Girard, L. Guiller, C. Landrault, S. Pravossoudovitch, P. Teixeira, and M. Santos, "Low power BIST by filtering nondetecting vectors," Journal of Electronic Testing: Theory and Applications (JETTA), vol. 16, pp. 193--202, June 2000.

.... or any sequential circuits in general [12] In scan based BIST, the test overhead may also be reduced by partial scan [13] The excessive power consumption in the BIST mode may be reduced by techniques such as test scheduling [3] reducing input activities [14] or filtering nondetecting vectors [15]. BIST readiness may be achieved by design changes [4] 16] 17] The feasibility of logic BIST on industrial circuits has been demonstrated in [4] and [17] in which different approaches were used to overcome the random pattern resistance of complex circuits. In particular, 4] uses test ....

S. Manich, A. Gabarro, M. Lopez, J. Figueras, P. Girard, L. Guiller, C. Landrault, S. Pravossoudovitch, P. Teixeira, and M. Santos, "Low power BIST by filtering nondetecting vectors," J. Electron. Test.: Theory Applicat. , vol. 16, no. 13, pp. 193--202, June 2000.

....XOR gates since it yields lowest power dissipation by itself. A mixed solution based on reseeding LFSRs and test vector inhibiting to filter non detecting subsequences of a pseudorandom test sequence has been proposed in [10] An enhancement of test vector inhibiting technique has been proposed in [11] where all the non detecting subsequences are filtered. A different approach for filtering non detecting vectors inspired by the precomputation architecture is presented in [12] An improvement in area overhead associated with filtering nondetecting vectors without penalty in fault coverage or ....

S. Manich, A. Gabarro, M. Lopez, J. Figueras, P. Girard, L. Guiller, C. Landrault, S. Pravossoudovitch, P. Teixeira, and M. Santos, "Low power BIST by filtering non-detecting vectors," Journal of Electronic Testing: Theory and Applications (JETTA), vol. 16, pp. 193--202, June 2000.

No context found.

S. Manich, A. Gabarro, J. Figueras, P. Girard, L. Guiller, C.Landrault, S. Pravassoudovitch, J. P. Teixeira, and M. Santos. Low-PowerBIST by Filtering Non-Detecting Vectors. accepted for publication in Journal of Electronic Testing, Theory and Application (JETTA), 15, 2000.

No context found.

S. Manich, et. al., "Low Power BIST by filtering Non-Detecting Vectors," in Proc. European Test Workshop (ETW'99), pp. 165170, 1999.

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