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IBM 9076 Scalable POWERparallel 1: General information. IBM brochure GH26-7219-00, February 1993. Available from http://ibm.tc.cornell.edu/ibm/pps/sp2/index.html .

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This paper is cited in the following contexts:
High Performance Messaging on Workstations: - Illinois Fast Messages   (Correct)

....can be programmed on either the host or the network interface, balanced decompositions allow overlapping of the two levels and supporting 7 a higher message rate. Of course, configurations of host and network coprocessor in which the host processor is much faster and has significantly more memory [6, 20, 26] (e.g. our configuration) favor assigning more work to the host. 4 Fast Messages 1.0 Implementation Design The FM 1.0 implementation consists of two basic parts: the host program and the LANai control program (LCP) These programs coordinate through the LANai memory which is mapped into the host ....

....some penalty in latency 512 byte packets deliver 19.6 MB s, greater than OC 3 ATM, and competitive with commercial massively parallel machines. For example, while FM s latencies are larger than Active Messages on the CM 5, the bandwidth is much higher. FM also compares favorably to recent MPPs [20, 21] in both bandwidth and latency. While there may appear to be many design tradeoffs involving performance for short or long messages (latency versus bandwidth) the design of FM is a counterexample. Despite consistently favoring low latency, the delivered peak bandwidth is within a few MB s of the ....

IBM 9076 Scalable POWERparallel 1: General information. IBM brochure GH26-7219-00, February 1993. Available from http://ibm.tc.cornell.edu/ibm/pps/sp2/index.html .


High Performance Messaging on Workstations: Illinois Fast.. - Pakin, Lauria, Chien (1995)   (275 citations)  (Correct)

....can be programmed on either the host or the network interface, balanced decompositions allow overlapping of the two levels and supporting a higher message rate. Of course, configurations of host and network coprocessor in which the host processor is much faster and has significantly more memory [6, 20, 26] (e.g. our configuration) favor assigning more work to the host. 4 Fast Messages 1.0 Implementation Design The FM 1.0 implementation consists of two basic parts: the host program and the LANai control program (LCP) These programs coordinate through the LANai memory which is mapped into the host ....

....some penalty in latency 512 byte packets deliver 19.6 MB s, greater than OC 3 ATM, and competitive with commercial massively parallel machines. For example, while FM s latencies are larger than Active Messages on the CM 5, the bandwidth is much higher. FM also compares favorably to recent MPPs [20, 21] in both bandwidth and latency. While there may appear to be many design tradeoffs involving performance for short or long messages (latency versus bandwidth) the design of FM is a counterexample. Despite consistently favoring low latency, the delivered peak bandwidth is within a few MB s of the ....

IBM 9076 Scalable POWERparallel 1: General information. IBM brochure GH26-7219-00, February 1993. Available from http://ibm.tc.cornell.edu/ibm/pps/sp2/index.html .


High Performance Virtual Machines (HPVM): Clusters with.. - Andrew Chien (1997)   (7 citations)  (Correct)

....to increase in performance, they have approached the performance of the fastest vector processors and, because of their low cost, have become the building block of choice for high performance parallel computing systems. Machines such as the Intel Paragon [12] Thinking Machines CM 5 [24] IBM SP2 [11], and, more recently, SGI Cray s T3D [5] T3E [19] and Origin 2000 [20] are all based on microprocessors, and combine them in parallel configurations to achieve high performance. This unification of processor designs between high performance computers and the desktop yield interesting synergies: ....

IBM Corporation, Scalable POWERparallel System, 1995. Available from http:// ibm.tc.cornell.edu/ibm/pps/sp2/sp2.html.

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