Hellwagner H, Weidendorfer J. SCI Sockets Library. SCI: Scalable Coherent Interface. Architecture and Software for High-Performance Compute Clusters (Lecture Notes in Computer Science, vol. 1734), Hellwagner H, Reinefeld A (eds.). Springer, 1999.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....does not limit the scalability of the underlying architecture. We have previously implemented a prototype relaxed consistency system within the SMiLE (Shared Memory in a LANlike Environment) project [3] This SCI VM [4] 5] system was built with Dolphin s Scalable Coherent Interface [6] [7] on top of a commodity x86 cluster. One difficulty in implementing this approach is the inability of current processors to selectively invalidate cache blocks. This means that the entire cache has to be invalidated at every synchronization point, which leads to additional overhead caused by ....

....use of POSIX threads on most commodity operating systems [20] This scheme has the distinct advantage that it relies solely on commodity components, and can hence be implemented on today s hardware. We have done this within the SCI VM [4] 5] project on commodity clusters interconnected with SCI [7], 6] It has yielded good performance on many benchmarks. In the following, however, we will not further address this prototype implementation, but instead use pure simulation to facilitate the comparison against other schemes. B. Cache Footprint Invalidation To reduce cache miss overhead, it ....

H. Hellwagner and A. Reinefeld, Eds., SCI: Scalable Coherent Interface. Architecture and Software for High-Performance Compute Clusters, ser. LNCS State-of-the-Art Survey. Springer Verlag, Oct. 1999, vol. 1734, iSBN 3-540-66696-6.

....models. Both codes have been executed using the HAMSTER environment [24] a framework for shared memory programming on top of loosely coupled NUMA architectures. Its current implementation is targeted towards non coherent NUMA cluster based on the Scalable Coherent Interface (SCI) [6, 9] and implements the two relaxed consistency models as described above. It therefore also proves the feasibility and usability of the proposed approach in a real world scenario. Table 1 summerizes the results of this set of experiments. It includes data for both codes gathered during two runs ....

....that can be expect by architectures capable of executing partial cache invalidations. 5 First Experimental Results As already mentioned above, the technical feasibility of the proposed concepts has been shown before using a sample NCC NUMA system based on a cluster of PCs connected via SCI [6, 9] (using SCI PCI bridges without coherency support) and with a comprehensive software framework called HAMSTER [24] capable of supporting a large range of shared memory programming models on top of a single core. On top of this architecture both numerical ker RADIX WATER (N Squared) Release C. ....

H. Hellwagner and A. Reinefeld, editors. SCI: Scalable Coherent Interface. Architecture and Software for HighPerformance Compute Clusters, volume 1734 of LNCS Stateof -the-Art Survey. Springer Verlag, Oct. 1999. ISBN 3-54066696 -6.

....with previous papers. The following performance results were obtained using a cluster of dual INTEL PENTIUM II 450 MHz PC nodes with 128 MB of RAM and a 33 MHz 32bit PCI bus running LINUX Kernel 2.2.13. The cluster interconnection networks are 100 Mb s FAST ETHERNET for TCP, DOLPHIN SCI ( 8] [7]) D310 NICs) for SISCI and MYRINET (LANai 4.3, 32bit bus, 1 MB SRAM) for BIP [10] Results were obtained by ping pong tests (half round trip) Raw Performances Raw performance results for Madeleine III over TCP Fast Ethernet, SISCI SCI and BIP Myrinet are displayed in figures 6, 7 and 8. The ....

H. Hellwagner and A. Reinefeld, editors. SCI: Scalable Coherent Interface, Architecture and Software for High-Performance Compute Clusters, volume 1734 of Lect. Notes in Comp. Science, State-of-the-Art Surveys. Springer-Verlag, 1999.

....with previous papers. The following performance results were obtained using a cluster of dual Intel Pentium II 450 MHz PC nodes with 128 MB of RAM and a 33 MHz 32bit PCI bus running Linux Kernel 2.2.13. The cluster interconnection networks are 100 Mb s Fast Ethernet for TCP, Dolphin SCI ( 8] [7]) D310 NICs) for 10 100 1000 10000 100000 Transfer time over Madeleine III TCP 0 5 10 Bandwidth over Madeleine III TCP Figure 6: Latency and bandwidth over TCP Fast Ethernet SISCI and Myrinet (LANai 4.3, 32bit bus, 1 MB SRAM) for BIP [10] Results were obtained by ping pong tests ....

H. Hellwagner and A. Reinefeld, editors. SCI: Scalable Coherent Interface, Architecture and Software for High-Performance Compute Clusters, volume 1734 of Lect. Notes in Comp. Science, State-of-the-Art Surveys. Springer-Verlag, 1999.

....The evaluation is performed on two different platforms using two di erent communication interfaces: the SISCI in2 javac Sun s compiler java2c compiler Prog.java gcc Prog.class Prog libs (bytecode) Prog. ch] Fig. 1. Compiling Java programs with Hyperion terface on top of a SCI network [14] and the MPI BIP interface on top of a Myrinet network [15] 2 The Hyperion system Our vision is that programmers will develop Java programs using the workstations on their desks and then submit the programs for production runs to a high performance Java execution server that appears as a ....

H. Hellwagner, A. Reinefeld (Eds.), SCI: Scalable Coherent Interface. Architecture and Software for High-Performance Compute Clusters, Vol. 1734 of Lect. Notes in Comp. Science, Springer-Verlag, 1999.

....of TMs. is in charge of the generic buffer management. It is made of several Buffer Management Modules (BMM) each of these implementing a given buffer management policy. 3. 2 Transfer Management One of the goals of Madeleine II is to support multimodal interfaces such as VIA [4] or SISCI SCI [7]. Such interfaces provide several data transfer methods. For instance, regular Processor IO (PIO) and Direct Memory Access (DMA) are available for Dolphin SCI NICs. Moreover, it should be able to easily take into account interface implementations like BIP Myrinet [13] which make a difference ....

H. Hellwagner and A. Reinefeld, editors. SCI: Scalable Coherent Interface, Architecture and Software for HighPerformance Compute Clusters, volume 1734 of Lect. Notes in Comp. Science, State-of-the-Art Surveys. Springer-Verlag, 1999.

....an extensible online monitoring system (OMIS OCM) This forms the basis for an extensive tool environment on top of this emerging platform, which allows easy application porting, debugging, and performance tuning. 1 Motivation With the rise of PC clusters based on high speed networks like SCI [8, 5], Myrinet [3] or GigaNet [25] the question of their programmability has become increasingly important to resolve. While the traditional approaches are based on message passing, the more comfortable shared memory model, previously restricted to tightly coupled system like SMPs, is gaining ....

....acquisition, and evaluation of memory access patterns responsible for bad locality have to be developed. The SMiLE project (Shared Memory in a LAN like Environment) targets these research issues with both hardware and software efforts for SCI based clusters. SCI or the Scalable Coherent Interface [8, 5] is an IEEE standardized, state of the art interconnection fabric with link speeds in the newest generation of up to 6.4 Gbit s. The fast communication is provided in a VI Architecture [4] style through a global SCI address space in a Hardware DSM fashion at user level allowing for direct remote ....

H. Hellwagner and A. Reinefeld, editors. SCI: Scalable Coherent Interface. Architecture and Software for High-Performance Compute Clusters, volume 1734 of LNCS State-of-the-Art Survey. Springer Verlag, Oct. 1999. ISBN 3-540-66696-6.

....however, present a challenge on inexpensive, non propriety loosely coupled cluster like systems with separate operating system instances on each node. This work presents a prototype of such a hybrid DSM system targeted for clusters of PCs interconnected using the Scalable Coherent Interface (SCI) [5]. SCI is an IEEE standardized [9] state of the art SAN technology allowing for link speeds of up to 400 MB s 1 and a process toprocess communication bandwidth of up to 80 MB s and latencies as low as 2 s. In order provide such a high per 1 New adapter cards with link speeds of up to 800 MB s ....

....run on a commodity PC cluster with up to four nodes, each built around a 450 MHz Pentium II on top of a 440GX chipset and with 512 MB main memory. The cluster is interconnected with standard switched Fast Ethernet for control communication and outside connection and an SCI interconnection fabric [5, 9] for application communication and the construction of the hybrid DSM. For the latter, the PCI SCI bridges D310 from Dolphin Interconnect Solutions (LC 2, Rev.D) are deployed and connected in a ringlet topology. These adapter cards allow for link speeds of up to 400 MB s and a process toprocess ....

H. Hellwagner and A. Reinefeld, editors. SCI: Scalable Coherent Interface. Architecture and Software for High-Performance Compute Clusters, volume 1734 of LNCS State-of-the-Art Survey. Springer Verlag, October 1999. ISBN 3-540-66696-6. 7

....work presents the NEPHEW approach and discusses its applicability using an example application from the area of nuclear medical imaging, the reconstruction of PET images. 1 Motivation With the rise of commodity clusters interconnected with high speed system area networks (SANs) such as SCI [4][3], Myrinet [2] or GigaNet [6] high performance parallel computing has become available to more users than ever before. The programming of such systems, however, is still mostly based on pure message passing in the form of libraries like PVM [1] and MPI [5] This is generally perceived as archaic ....

....of the underlying communication network and is generally intended to be used with standard Fast Ethernet. For applications with higher communication demands, however, other interconnection technologies have to be deployed. Within the NEPHEW project, the Scalable Coherent Interface (SCI) [3] is used for this purpose. SCI is a state of the art IEEE standardized [4] high performance SAN. It provides a end to end bandwidth of up 118 MB s and process to process latencies as low as 2 us. This is achieved through user level communication through hardware DSM mechanisms o ered by SCI. ....

H. Hellwagner and A. Reinefeld, editors. SCI: Scalable Coherent Interface. Architecture and Software for High-Performance Compute Clusters, volume 1734 of LNCS State-ofthe -Art Survey. Springer Verlag, October 1999. ISBN 3-540-66696-6.

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H. Hellwagner, A. Reinefeld (Eds.), SCI: scalable coherent interface, architecture and software for high-performance compute clusters, vol. 1734, LNCS State-of-the-Art Survey, Springer, Berlin, October 1999. ISBN 3-540-66696-6.

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Hellwagner H, Weidendorfer J. SCI Sockets Library. SCI: Scalable Coherent Interface. Architecture and Software for High-Performance Compute Clusters (Lecture Notes in Computer Science, vol. 1734), Hellwagner H, Reinefeld A (eds.). Springer, 1999.

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