D. Verkest, et al, "Matisse: a system-on-chip design methodology emphasizing dynamic memory management", VLSI '98. Proc. of IEEE Computer Society Workshop, 1998 Pages: 110--115. Home/Search Document Details and Download
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Verification of a complex SoC; the PRO³ case-study - Andritsopoulos.. (Correct)
.... since the execution time of the non normal states is not critical, we can divert the flow to non real time execution systems such as the internal RISC (Figure 1) For the definition of the memory requirements and the optimization of the data structures stored in the system, the Matisse tool [14] was used. The tool provided valuable results for the IP firewalling application, though the ATM signalling code could not be evaluated, due to its layered structure and the socket mechanism used to exchange data between different layers. 4. Design for verifiability According to ITRS [7] ....
D. Verkest, J. L. Silva, C. Ykman, K. Croes, M. Miranda, S. Wuytack, F. Catthoor, G. Jong, and H. D. Man. Matisse: a system-on-chip design methodology emphasizing dynamic memory management. Journal of VLSI Signal Processing, 21(3):219--232, 1999.
Efficient Memory Management for High-Speed ATM Systems - Serpanos (2001) (Correct)
....and scalability desired. The evaluation of such trade off s is quite important, considering the increasing deployment of embedded systems. This has led to efforts of other researchers to develop tools for the exploration of the design space for applications that are memory management intensive [18], and especially for network applications [19] Although no such tools were used in our work, due to their recent appearance, we expect that they will decrease the length of the design cycle significantly. The paper is organized as follows. Section 2 introduces ATM systems and analyzes their ....
Verkest, D., et al. Matisse: A system-on-chip design methodology emphasizing dynamic memory management. Journal of VLSI Signal Processing, 21(3): 277--291, July 1999.
System Level Design Using C++ - Verkest, Kunkel, Schirrmeister (2000) Self-citation (Verkest) (Correct)
....allow the designer to make the right decisions and support the designer in changing the SoC model to reflect the implementation decisions. This type of incremental refinement flow using the C framework has been applied in several application domains, such as network protocol processing (ATM) [5,31] and digital telecom systems [3,22,23,24] including embedded software components [6] The next paragraphs illustrate how these principles have been applied in the OCAPI design environment [23,38] Architecture RTL of my processor is begin SYNC: process (clk) begin if (clk event and clk = 1 ) ....
....is difficult. Due to effects such as aliasing, analysis of pointers and where they point to is non trivial. Though one can restrict synthesizable descriptions to exclude pointers, this problem cannot be ignored in the long term. While some progress has already been reported in this area [28,31], more work needs to be done. Another challenge is in extending the synthesizable subset to include objectoriented features like virtual functions, multiple inheritance, etc. More work is required to define the object oriented semantics for hardware before synthesis can be attempted. Figure 4. ....
D. Verkest, J. da Silva, C. Ykman, K. Croes, M. Miranda, S. Wuytack, F. Catthoor, G. de Jong, and H. De Man, "Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management", Journal of VLSI Signal Processing, 21(3):185-194, July 1999.
Operating System based Software Generation for Systems-on-Chip - Desmet, Verkest, De Man (2000) (12 citations) Self-citation (Verkest De man) (Correct)
....flow [12] is integrated in SoCOS. In this paper we will show more in detail how SoCOS can be used in embedded software design. The emphasis will be on the task concurrency issues. Memory management is an equally important design aspect in SoCOS, which is already extensively covered in other tools [14], and will not be further discussed here. It is important to notice that the major difference with an RTOS is, that SoCOS is used for simulation and analysis of the system, including its real time behavior, on a workstation, while an RTOS is an implementation library running on the target ....
D. Verkest, J. da Silva, C. Ykman, K. Croes, M. Miranda, S. Wuytack, G. de Jong, F. Catthoor, and H. De Man. Matisse: A system-on-chip design methodology emphasizing dynamic memory management. Journal of VLSI Signal Processing, 21(3):277--291, July 1999.
Efficient Field Processing Cores in an Innovative.. - Lykakis Mouratidis.. (2003) (Correct)
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D. Verkest, et al, "Matisse: a system-on-chip design methodology emphasizing dynamic memory management", VLSI '98. Proc. of IEEE Computer Society Workshop, 1998 Pages: 110--115.
Dynamic Memory Management for Embedded Real-Time Multiprocessor.. - Shalan (Correct)
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Verkest, D., "Matisse: a system-on-chip design methodology emphasizing dynamic memory management," Journal of VLSI Signal Processing, Vol. 21, No. 3, pp. 219--232, 1999.
Systematic Embedded Software Generation from SystemC - Herrera Posadas Snchez (2003) (1 citation) (Correct)
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D. Verkest, J. da Silva, C. Ykman, K.C roes, M. Miranda, S. Wuytack, G. de Jong, F. Catthoor and H. de Man. Matisse: A system-on-chip design methodology emphasizing dynamic memory management. Journal of VLSI signal Processing, 21(3): 277-291, July 1999.
Memory Aware Task Assignment and Scheduling for Multiprocessor.. - Szymanek (2001) (1 citation) (Correct)
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Verkest, D.; Lead da Silva, J., Jr.; Ykman, C.; Croes, K.; Miranda, M.; Wuytack, S.; de Jong, G.; Catthoor, F.; De Man, H., "Matisse: a system-on-chip design methodology emphasizing dynamic memory management", in Proc. IEEE Computer Society Workshop on VLSI'98 System Level Design, 1998, Page(s): 110-115.
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