R. Ernst, D. Ziegenbein, K. Richter, L. Thiele, and J. Teich. Hardware/software codesign of embedded systems - the SPI workbench. In Proceedings IEEE Workshop on VLSI, Orlando, USA, June 1999.  Home/Search   Document Not in Database   Summary   Related Articles

....RTW intermediate format. 4. The intermediate format is translated into an XML [8] representation of SPI processes, channels, and process and channel attributes (System.SPI.XML) which can be validated by our SPI.DTD 2 . The XML representation is used as an exchange format in the SPI workbench [4]. This step is performed by the standard RTW code generator, using a set of SPI XML codegeneration rules (SPI.TLC) 5. The standard RTW C code generator is modified to generate a single C function for every SPI process generated in step 4. This separates process function from scheduling, thus ....

....scheduling, thus opening the design space for exploration. 6. The designer specifies timing constraints as necessary. At this point, a SPI model of the Simulink design is available, with timing constraints and references to an executable process model in C. Tools that hook into the SPI workbench [4] can now be applied. Behavioral intervals for process and communication timing can be analyzed [13] and the results annotated to SPI processes and channels. The SPI model generated from the Simulink design can also be integrated with SPI models generated from system parts specified in other ....

R. Ernst, D. Ziegenbein, K. Richter, L. Thiele, and J. Teich. Hardware/software codesign of embedded systems - the SPI workbench. In Proceedings IEEE Workshop on VLSI, Orlando, USA, June 1999.

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