E. A. Emerson and R. J. Trefler, "From asymmetry to full symmetry: New techniques for symmetry reduction in model checking," in Prof. Conf. Correct Hardware Design and Verification Methods, vol. 1703, Lecture Notes on Comp. Sci., 1999, pp. 142--156.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....[56] is a model checker that has been speci cally designed to exploit both process symmetry and state symmetry when checking certain properties under di erent fairness assumptions. Some approaches consider the case where systems are not totally symmetric, that is when they are nearly symmetric [23] or partially symmetric [37] The case in which a property is not invariant under a given symmetry is investigated in [55] Case Reduction While we are not aware of any examples of this application of symmetry in model checking, a similar phenomena is explored in the isomorph free model ....

E. Allan Emerson and Richard J. Tre er. From asymmetry to full symmetry: New techniques for symmetry reduction in model checking. In L. Pierre and T. Kropf, eds. Proc. CHARME `99, vol. 1703 LNCS, pp. 142-156, 1999. Springer-Verlag.

....non trivial symmetries grows double exponentially. On the other hand, for a function with exponentially many symmetries, trying to explicitly use all symmetries may defeat the purpose of speeding up search [18] Despite these pitfalls, symmetry based approaches have been useful in model checking [26, 15, 23], hardware verification [36] software verification [11] logic synthesis [28, 9] and DSP algorithms [22] Some researchers limited the notion of symmetry to swaps of variables [22] or subsets of variables [28] to achieve efficiency. Other works [9, 44] limited the notion of symmetry to negations ....

....e.g. via incomplete algorithms, ii) finding [some] semantic symmetries that are not necessarily syntactic, iii) more efficient constructions of symmetry breaking clauses, and (iv) the use of partial conditional symmetries. The latter were already shown useful in BDD based model checking [23], SAT solvers based on backtracking [13, 31] and more general constraint satisfaction solvers [6] Acknowledgements This work is funded by the DARPA MARCO Gigascale Silicon Research Center, an Agere Systems SRC Research fellowship and a fellowship from the ACM IEEE Design Automation Conference. ....

E. A. Emerson and R. J. Trefler, "From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking", Conf. on Correct Hardware Design and Verification Methods (CHARME) `99, Lecture Notes on Computer Science, Springer 1999.

....for each orbit in order to obtain a smaller BDD for the orbit relation. Yet, this method does not solve the problem of choosing the representatives. The choice of representatives is significant since it strongly influences the size of the BDDs representing the symmetry reduced model. [11] suggests to choose generic representatives. This approach involves compiling the symmetric program to a reduced model over the generic states. Such a compilation can only be applied to programs written with a special syntax in which symmetry is defined inside the program. 12] introduces an ....

E. A. Emerson and R. J. Trefler. From asymmetry to full symmetry: New techniques for symmetry reduction in model checking. In Conference on Correct Hardware Design and Verification Methods, pages 142--156, 1999.

....context of asynchronous systems. For a more complete overview we refer to the bibliography of [19] Emerson and Sistla have applied the idea to CTL model checking in [10] with extensions to fairness in [13] and [15] In [11] Emerson and Tre er extended the concepts to real time logics, while in [12] they considered systems that are almost symmetric. Clarke, Enders, Filkorn, and Jha used symmetries in the context of symbolic model checking in [4] Emerson, Jha, and Peled, and more recently Godefroid, have studied the combination of partial order and symmetry reductions, see [9, 14] Our work ....

E.A. Emerson, R.J. Tre er, From asymmetry to full symmetry: new techniques for symmetry reduction in model checking, Proc. of CHARME'99 (The 10th IFIP WG10.5 Advanced Research Working Conference on Correct Hardware Design and Verication Methods), Bad Herrenalb, Germany, Sep. 1999.

.... have been proposed which make use of such high level information and which are based on word level verification techniques, like for example Word Level Decision Diagrams (e.g. 8] formal Bitvector Theories (e.g. 1, 6] Integer Linear Programming (e.g. 14] Symmetry Reductions (e.g. [4, 9]) and Term Rewriting (e.g. 7] to survey only a few. 2 Scaling Design Sizes before Verification This paper presents a new word level abstraction technique which is used as a preprocess in high level property checking of digital circuits. The proposed method automatically scales down data path ....

E. A. Emerson and R. J. Trefler. "From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking". In Proc. CHARME, pages 142--156, 1999.

....outlined a method for ecient calculation of a canonical representative for a special case when the global state vector consists only of individual process locations (program counters) i.e. no variables are allowed. In [11] Emerson and Tre er extended the concepts to real time logics, while in [12] they considered systems that are almost symmetric and they also adapted the method for nding a canonical representative from [10] in the context of symbolic model checking. Clarke, Enders, Filkorn, and Jha used symmetries in the context of symbolic model checking in [4] where they proposed a ....

E.A. Emerson, R.J. Tre er, From asymmetry to full symmetry: new techniques for symmetry reduction in model checking, Proc. of CHARME'99 (The 10th IFIP WG10.5 Advanced Research Working Conference on Correct Hardware Design and Verication Methods), Bad Herrenalb, Germany, Sep. 1999.

....the number of variables. Therefore, applying model checking to large industrial designs is still a hard problem. On the other hand, a number of state reduction approaches have been proposed to reduce the number of states under verification. State reduction techniques include symmetry reductions [43, 44, 58, 62], partial order reductions [51] and abstraction techniques [34, 31, 75] Among these techniques, abstraction is the most general technique for handling the state explosion prob6 lem. In fact, it is essential for verifying designs of industrial complexity. Currently, abstraction is typically a ....

E.A. Emerson and R.J. Trefler. From asymmetry to full symmetry: new techniques for symmetry reduction in model checking. In Correct Hardware Design and Verification Methods, volume 1703 of LNCS, pages 142--156, 1999.

....initially x = 0 action a[i : natural] x i) x : i 5. 2 Symmetric Programs Bisimulation reductions for semantically symmetric programs have been proposed in [ES93,CFJ93] It is computationally difficult, however, to implement such reductions symbolically (i.e. with BDD s) CFJ93] Hence, ET99] consider syntactically symmetric programs, defined using symmetric predicates such as 3 A similar tradeoff occurs in finite domain [PRSS99] vs. predicate abstraction [SGZ 98] approaches to verifying combinational circuits over integer variables. 8i : P (i) The reduction of such a ....

....each l 2 [0 : n] requiring k (n 1) correlated) boolean variables, but with a poly(n) size BDD for each action. On the other hand, as our algorithm calculates only those predicates necessary for the reduction, it may also produce a program with fewer than the k log(n) bits required by [ET99] 6 Related Work and Conclusions Among related work, GS97,CABN97,BLO98,CU98] also propose predicate abstraction methods. CABN97] performs a simple syntactic transformation, but requires the use of a constraint solver during the model checking process. The methods of [GS97,BLO98,CU98] utilize ....

E.A. Emerson and R.J. Trefler. From asymmetry to full symmetry: New techniques for symmetry reduction in model checking. In CHARME, volume LNCS, 1999.

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E. A. Emerson and R. J. Trefler, "From asymmetry to full symmetry: New techniques for symmetry reduction in model checking," in Prof. Conf. Correct Hardware Design and Verification Methods, vol. 1703, Lecture Notes on Comp. Sci., 1999, pp. 142--156.

No context found.

E. A. Emerson and R. J. Trefler. From asymmetry to full symmetry: New techniques for symmetry reduction in model checking. In Conference on Correct Hardware Design and Verification Methods, pages 142--156, 1999.

No context found.

E.A. Emerson, R.J. Tre#er, From asymmetry to full symmetry: new techniques for symmetry reduction in model checking, Proc. of CHARME'99 #The 10th IFIP WG10.5 AdvancedResearch Working Conference on Correct Hardware Design and Veri#cation Methods#, Bad Herrenalb, Germany, Sep. 1999.

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