P. B. Gibbons, Y. Matias, and V. Ramachandran. The Queue-Read Queue-Write PRAM Model: Accounting for Contention in Parallel Algorithms. SIAM Journal on Computing, 28(2):733--769, 1998.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....tree based barrier and a heavy weight barrier and placing in our libraries architecture specific information that can replace the heavy barrier with the light weight one whenever the architecture permits it. 3. 2 Complexity model for shared memory Various cost models have been proposed for SMPs [1, 2, 3, 4, 6, 16, 18, 38, 45]; we chose the Helman and JaJa model [18] because it gave us the best match between our analyses and our experimental results. Since the number of processors used in our experiments is relatively small (not exceeding 64) contention at the memory location is negligible compared to the contention ....

P. B. Gibbons, Y. Matias, and V. Ramachandran. The Queue-Read Queue-Write PRAM Model: Accounting for Contention in Parallel Algorithms. SIAM Journal on Computing, 28(2):733--769, 1998.

....requests handled by a bank. The difficulty with this model is that the contention it describes depends on specific implementation details such as the memory map, which may be entirely beyond the control of the algorithm designer. A more general version of this model was suggested by Gibbons et al. [7]. Known as the Queue Read Queue Write (QRQW) PRAM model, it decomposes an algorithm into a series of synchronous steps. The time required for a given step is simply the maximum of the time required by any processor for computation, the number of memory accesses made by any processor, and the ....

P.B. Gibbons, Y. Matias, and V. Ramachandran. The Queue-Read Queue-Write PRAM Model: Accounting for Contention in Parallel Algorithms. SIAM Journal on Computing, 1997. To appear.

....Observation 2.1 Any super step of the qsm(m) with cost t can be simulated in at most 8t steps of EREWPPRAM (m) using the same number of processors. Proof of Observation 2.1: The idea of the proof is quite standard and appears widely when simulating the communication step of PRAM models (e. g [11] [16]) The pattern of memory references during a super step is fixed, and can be represented by a bipartite graph G = P; M;E) where each node on the P side represents a processor, each node on the M side represents a memory cell that is referenced during the super step, and E is composed of all ....

....simulation. This does not carry automatically to the simulation of an entire algorithm within the same time factor due to the fact that rearranging memory cells into processors might be required. Indeed, not every qsm(m) algorithm can be simulated by EREWPPRAM (m) in constant slow down as shown in [16] for the QRQW model (which is identical to qsm(m = p) In particular, 2 Gamma 2) routing can not be done in constant time in the EREW PPRAM(p = m) Theorem 2.6 in this text) yet takes O(1) steps in the qsm model (with p = m) 3] We now state a very simple observation which addresses the ....

P. B. Gibbons, Y. Matias, and V. Ramachandran. The queue-read queue-write pram model: Accounting for contention in parallel algorithms. SIAM J. on Computing, (2):733--769, 1997.

....very start when all processors attempt to install the element they are working on at the root. Once the tree contains O(P ) levels, the random nature of element selection will reduce the expected contention at each element to O(1) If P N , initial contention is less of an issue, even under QRQW [22] assumptions since the running time of the algorithm will be dominated by N . As N approaches P , contention begins to play a greater role in determining running time. In this section we try to overcome this to some extent by presenting a randomized method for lowering contention to O( p P ) ....

Gibbons, P. B., Matias, Y., and Ramachandran, V. The Queue-Read Queue-Write PRAM model: Accounting for contention in parallel algorithms. In Proceedings of the 5th ACM-SIAM Symp. on Discrete Algorithms, January, 1994, pp. 638--648.

....very start when all processors attempt to install the element they are working on at the root. Once the tree contains O(P ) levels, the random nature of element selection will reduce the expected contention at each element to O(1) If P N initial contention is less of an issue, even under QRQW [14] assumptions since the running time of the algorithm will be dominated by N . As N approaches P contention begins to play a greater role in determining running time. In this section we try to overcome this to some extent by presenting a method for lowering contention to O( p P ) 3.1 Low ....

Gibbons, P. B., Matias, Y., and Ramachandran, V. The Queue-Read Queue-Write PRAM model: Accounting for contention in parallel algorithms. In Proceedings of the 5th ACM-SIAM Symp. on Discrete Algorithms, January, 1994, pp. 638--648.

....for concurrent reading to be possible. In addition, there is a further memory access rule description: QRQW (Queue Read, Queue Write) for each memory location, one processor succeeds in reading or writing, and other unsuccessful requests are added to a queue to be satisfied in subsequent steps [GMR94] However, this is still not a sufficient specification of memory access, as the effect of concurrent writing to the same location has not been specified. Hence, the options for CRCW, in increasing order of power, are: common all values written to a location at any one time must be identical, ....

P. B. Gibbons, Y. Matias, and V. Ramachandran. The queue-read queue-write PRAM model: Accounting for contention in parallel algorithms. Technical report, AT&T, 1994.

....We further motivate the ERCW PRAM by its relation to parallel computers with optical communication networks. Since there is no queue delay in optical communication networks, the ERCW PRAM is a better model for parallel machines with such networks than the recently proposed QRQW (or ERQW) model [23]. Many results for the ERCWPRAM follow directly from results for the EREW PRAM or CRCW PRAM. For instance, the global OR of n bits can be found in constant time on an n processor ERCW PRAM, as on a CRCW PRAM, but broadcasting 1 bit to n processors requires Theta(log n) steps, as on an EREW PRAM. ....

P. B. Gibbons, Y. Matias, V. Ramachandran. The Queue-Read Queue-Write PRAM model: Accounting for contention in parallel algorithms. In Proc. ACM-SIAM Symp. on Discrete Algs. 1994, SIAM J Comput, to appear.

....We further motivate the ERCW PRAM by its relation to parallel computers with optical communication networks. Since there is no queue delay in optical communication networks, the ERCW PRAM is a better model for parallel machines with such networks than the recently proposed QRQW (or ERQW) model [23]. Many results for the ERCWPRAM follow directly from results for the EREW PRAM or CRCW PRAM. For instance, the global OR of n bits can be found in constant time on an n processor ERCW PRAM, as on a CRCW PRAM, but broadcasting 1 bit to n processors requires Theta(log n) steps, as on an EREW PRAM. ....

P. B. Gibbons, Y. Matias, V. Ramachandran. The Queue-Read Queue-Write PRAM model: Accounting for contention in parallel algorithms. In Proc. ACM-SIAM Symp. on Discrete Algs. 1994, SIAM J Comput, to appear.

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P. B. Gibbons, Y. Matias, and V. Ramachandran. The queue-read queue-write PRAM model: Accounting for contention in parallel algorithms. Technical report, AT&T Bell Laboratories, Murray Hill, NJ, September 1994. Submitted for publication.

....PRAM algorithm for global OR with only constant overhead, resulting in a constant time algorithm. Note that since there is no queue delay in optical communication networks, the ERCW PRAM is a better model for parallel machines with such networks than the recently proposed QRQW (or ERQW) model [30]. Many results for the ERCWPRAM follow directly from results for the EREW PRAM or CRCW PRAM. For instance, the global OR of n bits can be found in constant time on an n processor ERCW PRAM, as on a CRCW PRAM, but broadcasting 1 bit to n processors requires Theta(log n) steps, as on an EREW ....

P. B. Gibbons, Y. Matias, V. Ramachandran. The Queue-Read Queue-Write PRAM model: Accounting for contention in parallel algorithms. In Proc. ACM-SIAM Symp. on Discrete Algs. 1994, SIAM J Comput, to appear.

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