J. Rabaey. System-level power estimation and optimisation - challenges and perspectives. In International Symposium on Low-Power Design, 1997.  Home/Search   Document Not in Database   Summary   Related Articles

....and active area for a given instruction from [8] while more sophisticated power models [36] can be integrated using the open interface. As timing and power estimation of software solutions is under investigation, the estimation for hardware solutions is left to [16] regarding timing and to [33, 32] regarding power. Even when working on the host with a simulator, the code of the software solution has to be cross compiled for the architecture under investigation. After the machine code has been generated, it is executed writing a trace on assembly level that references cost regarding timing ....

J. Rabaey. System-level power estimation and optimisation - challenges and perspectives. In International Symposium on Low-Power Design, 1997.

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