Toshiba, TC140G/14L Series Megacell Megafunction ASIC Gate Array Library, 1990 35

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Architectural Exploration - Bakshi, Juan, Gajski (1993)   (Correct)

....of ROM. In our designs we have assumed that the ROM is off chip and thus, Block 2 requires 12 off chip memory accesses. In this example, our design exploration was limited due to resource constraints. We assumed that the datapath was to be implemented on a single chip using gate array technology [9] and thus, we had an upper bound on the total gate count of the implementations. We first determined the direction of dataflow in Blocks 1, 3 and 4. This is indicated in the figures. We then partitioned (or blocked) each of the signal flow graphs to obtain the largest block size without ....

Toshiba, TC140G/14L Series Megacell Megafunction ASIC Gate Array Library, 1990 35

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