B. P. Dave and N. K. Jha : "CASPER: Concurrent Hardware-Software Co-Synthesis of Hard RealTime Aperiodic and Periodic Specifications of Embedded System Architectures", Proc. of 1998 Design Automation and Test in Europe (DATE '98), pp.118125 (1998).  Home/Search   Document Not in Database   Summary   Related Articles   Check

.... a grey box abstraction level in a combined MTG CDFG model [6] The grey box model is different from both the detailed white box model [1] where all the operations are considered during the mapping and where too much information is present to allow a system wide exploration, and the black box model [2, 3] where insufficient information is available to accurately steer even the most crucial cost trade offs. In contrast, the grey box specification is functional in representing the concepts of concurrency, timing constraints and interaction at either an abstract or a more detailed level, depending on ....

B.Dave and N.Jha, "CASPER: concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures ", Proc. 1st Design and Test in Europe, Paris, Feb. 1998, pp. 118-124.

....inside one process whereas a fine granularity (e.g. basic block level) may inhibit the application of optimizations which require a coarser granularity such as loop transformations. Therefore, some authors have proposed clustering strategies, either manual [9] or based on some closeness criteria [2, 3] originally used in high level synthesis [4] which are applied on different levels of granularity. In [7] it has been demonstrated that dynamic adaptation of granularity can be useful to obtain better partitioning results. Clustering, however, must be introduced carefully because it increases ....

B. P. Dave and N. K. Jha, "CASPER: Concurrent Hardware-- Software Co--Synthesis of Hard Real--Time Aperiodic and Periodic Specifications of Embedded System Architectures", in Proc. of the Design, Automation and Test in Europe Conference, pp. 118--124, 1998.

....justified by the application. Often, parts of the system clearly belong together, e.g. due to high internal communication, while other parts allow many implementation alternatives. Therefore, some authors have proposed clustering strategies, either manual [9] or based on some closeness criteria [2, 3] originally used in high level synthesis [4] which are applied on different levels of granularity. In [7] it has been demonstrated that dynamic This work is supported by the Deutsche Forschungsgemeinschaft. adaptation of granularity can be useful to obtain better partitioning results. ....

....by creating function elements which are suitable for a particular architecture (function element architecture mapping) and high level optimization for the architecture. In this paper, we will assume that this step is completely user driven. In contrast to previous clustering approaches [2, 3, 9], however, granularity adaptation and high level optimization are not unique but there are architecture dependent alternatives which lead to different versions of the design representation which are used for the remaining optimization tasks of hardware software co synthesis. This version ....

B. P. Dave and N. K. Jha, "CASPER: Concurrent Hardware-Software Co-Synthesis of Hard Real-Time Aperiodic and Periodic Specifications of Embedded System Architectures", in Proc. of the Design, Automation and Test in Europe Conference, pp. 118--124, 1998.

....However, those approaches do not consider overlapping functionality. The advantages of overlapping functionality have been described above. As far as variably sized segments are concerned, some authors have proposed clustering strategies, either manual [12] or based on some closeness criteria [2, 4] originally used in high level synthesis [5] which are applied on different levels of granularity. In [10] it has been demonstrated that dynamic adaptation of granularity can be useful to obtain better partitioning results. Clustering, however, must be introduced carefully because it tends to ....

B. P. Dave and N. K. Jha, "CASPER: Concurrent Hardware-- Software Co--Synthesis of Hard Real--Time Aperiodic and Periodic Specifications of Embedded System Architectures", in Proc. of the Design, Automation and Test in Europe Conference, pp. 118--124, 1998.

....reclaiming refers to exploiting a PE at run time when the actual execution time of a task is less than its specified worst case execution time. The work in [23] performs joint scheduling of distributed complex periodic and hard aperiodic tasks in statically scheduled systems. The algorithm in [7] performs concurrent hardware software co synthesis of hard realtime aperiodic and periodic task graphs. This involves allocating the required number of PEs and communication links of different types, assigning tasks and communication events to them and scheduling these tasks and events to meet ....

....scheme is simpler and more powerful in exploiting the slack time. 2) The combination of resource reclaiming and slack stealing also facilitates dynamic voltage scaling and power management. 3) Schedule slot reservation for hard aperiodic tasks is more efficient than the previous method given in [7], while still guaranteeing that all deadlines are met. 4) We provide a unified framework in which the response times of aperiodic tasks and power consumption are dynamically optimized simultaneously, which has not been done before. This paper is organized as follows: Section 2 presents a ....

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B. P. Dave and N. K. Jha, "CASPER: Concurrent hardwaresoftware co-synthesis of hard real-time aperiodic and periodic specifications of distributed embedded systems," in Proc. Design Automation & Test in Europe Conf., pp. 118-124, Feb. 1998.

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B. P. Dave and N. K. Jha : "CASPER: Concurrent Hardware-Software Co-Synthesis of Hard RealTime Aperiodic and Periodic Specifications of Embedded System Architectures", Proc. of 1998 Design Automation and Test in Europe (DATE '98), pp.118125 (1998).

No context found.

Dave, B.P.; Jha, N.K., "CASPER: Concurrent hardware -software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures ", in Proc. Design, Automation and Test in Europe Conference, 1998, Page(s): 118-124.

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B.P. Dave and N. Jha, "CASPER: Concurrent HardwareSoftware Cosynthesis of Hard Real-Time Aperiodic and Periodic Specifications of System Architectures," Proc. DATE, IEEE CS Press, 1998, pp. 118-124.

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