A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. To appear, 35th Design Automation Conference, 1998.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....identity or partial copy detection for digital libraries [Bri95] Recently, steganography and code obfuscation techniques have been endorsed as viable strategies for content and design protection. Protocols for watermarking activeIPhavebeendeveloped at the physical layout [Cha99] partitioning [Kah98], and behavioral specification [Qu98] level. In the software domain, good survey of techniques for copyright protection of programs has been presented by Collberg and Thomborson [Col99] They have also developed a code obfuscation method which aims at hiding watermarks in program s data ....

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. Design Automation Conference, pp. 782-787, 1998.

.... design integration, standardized on chip bus, manufacturing related test, system level design, and intellectual property protection (IPP) VSI97] Recently a number of techniques have been proposed for IPP of designs and tools at various design levels: design partitioning [Wol98] physical layout [Kah98], combinational logic synthesis [Kir98, Lac98] behavioral synthesis [Qu98, Hon98] and design for test [Kir98t] All these techniques facilitate augmentation of the user s digital signature, encoded as a set of additional design constraints, into the original design specification in a ....

....resulted in a suite of approaches for watermarking video, mainly MPEG2 [Spa96, Har97] As explicitly stated, none of these techniques can be applied to watermark active IP: designs or programs. Protocols for watermarking active IP have been developed at the physical layout [Wol98] partitioning [Kah98], logic synthesis [Kir98] partial scan selection [Kir98t] and behavioral specification [Qu98, Hon98] level. A routing level approach for fingerprinting FPGA digital designs has been introduced [Lac98] It applies encrypted marks to the design in order to support identification of the design ....

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. Design Automation Conference, 1998.

....of solution quality. The conducted experiments demonstrated that watermarking in many cases did not induce any performance nor area overhead. The problem of effective protection of intellectual property in the competitive EDA environment has been addressed at the level of physical design [Kah98] and behavioral specification [Hon98] In this paper, we present the first techniques for watermarking at the logic synthesis level. Embedding signatures into a design at this level has advantages over corresponding efforts at the higher and lower levels of the design process. Firstly, ....

.... research resulted in a suite of approaches for watermarking video [Har97] As explicitly stated, none of these techniques can be applied to watermark active intellectual property: designs or programs [Ber96] Protocols for watermarking active IP have been developed at the physical layout [Kah98] and behavioral specification [Hon98] level. A routing level approach for fingerprinting FPGA digital designs has been introduced [Lac98] It applies encrypted marks to the design in order to support identification of the design origin and the original recipient. Combinational logic synthesis has ....

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. To appear, 35th Design Automation Conference, 1998.

....The key difference of our proposed approach with those techniques is that all of them embed the watermark in the final object while our approach is incorporated in the design process. In the CAD domain, there have been several proposals for IPP using watermarking at the level of physical layout [9] and logic synthesis [10] 3 Objectives and Metrics for Watermarking In this Section we lay out the technical foundations required to develop a consistent quantitative approach for intellectual property protection using watermarking techniques. We first analyze the key watermarking properties ....

A. B. Kahng, et al. Robust IP Watermarking Methodologies for Physical Design. In Design Automation Conference, pages 782--787, 1998.

....a general technique was provided to watermark documents. In [2] a hierarchical watermarking method was proposed for the protection of multiple design abstraction levels and for tracking purposes. Moreover, methods were proposed to watermark physical design phases in full and semi custom circuits [3], FPGAs [4, 4] and finite state machines [5, 6] An alternative approach, known as tagging consists of generating a compressed representation of the hierarchy of a design using a given naming convention. The compressed hierarchy is then stored in a specific layer. The approach is less robust, as ....

....of states in the state transition diagram which is activated by a given sequence of (not necessarily legal) inputs. The corresponding sequence of outputs is also identified and the resulting sequence of input outputs is called IO signature [5] Unlikeother approaches found in the literature [3, 4, 9], fingerprints do not require any modification of the original designs and they are used merely as a verification tool. Identical fingerprints are however extremely unlikely to be achieved in significantly different designs. The odds that such an event occurs are denominated as Pu . Non extensive ....

A. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang and G. Wolfe, "Robust IP Watermarking Methodologies for Physical Design", in Proc. IEEE/ACM Design Automation Conference, pp. 782--787, June 1998.

....The process used for managing watermarks must not necessarily be proprietary, while the code used in the encryption process should be secret for any released IP. Recently, watermarking has been applied to digital audio visual IPs [2, 3] Similar schemes have also been proposed for electronic IPs [4, 5, 6, 7]. At least two types of watermarking schemes exist. The first scheme, known as active watermarking, consists of integrating the watermark as a part of the design process, thus allowing the creation of an arbitrarily high number of unique watermarks. The second scheme, known as passive ....

A. Kahng, S. Mantik, I. L. Markov,M. Potkonjak, P. Tucker,H. Wang and G. Wolfe, "Robust IP Watermarking Methodologies for Physical Design", in Proc. IEEE/ACM Design Automation Conference, pp. 782--787, June 1998.

....a general technique was provided to watermark documents. In [2] a hierarchical watermarking method was proposed for the protection of multiple design abstraction levels and for tracking purposes. Moreover, methods were proposed to watermark physical design phases in full and semi custom circuits [3], FPGAs [4, 4] and finite state machines [5, 6] An alternative approach, known as tagging consists of generating a compressed representation of the hierarchy of a design using a given naming convention. The compressed hierarchy is then stored in a specific layer. The approach is less robust, as ....

....of states in the state transition diagram which is activated by a given sequence of (not necessarily legal) inputs. The corresponding sequence of outputs is also identified and the resulting sequence of input outputs is called IO signature [5] Unlike other approachesfound in the literature [3, 4, 9], fingerprints do not require any modification of the original designs and they are used merely as a verification tool. Identical fingerprints are however extremely unlikely to be achieved in significantly different designs. The odds that such an event occurs are denominated as . Non extensive ....

A. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang and G. Wolfe, "Robust IP Watermarking Methodologies for Physical Design", in Proc. IEEE/ACM Design Automation Conference, pp. 782--787, June 1998.

....process, traditionally used in banknotes and other documents to discourage counterfeiting. It consists of printing semi transparent symbols embedded on paper. Similar concepts have been applied to digital audio visual IPs [1, 2] Watermarking, applied to IC design, has been recently proposed in [3, 4]. In [3] we have proposed to simultaneously create watermarks in several design abstractions. The method, which is adopted in this paper as well, is particularly resilient to tampering and redesign due to its inherent distributed nature. In fact, several possibly independent abstraction levels are ....

A. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang and G. Wolfe, "Robust IP Watermarking Methodologies for Physical Design", in Proc. IEEE/ACM Design Automation Conference, pp. 782--787, June 1998.

....copy detection for digital libraries [Bri95] Recently, researchers have endorsed steganography and code obfuscation techniques as viable strategies for content and design protection. Protocols for watermarking active IP have been developed at the physical layout [Cha99, Wol98] partitioning [Kah98], logic synthesis [Oli99, Kir98] partial scan selection [Kir98t] and behavioral specification [Qu98, Hon98] level. A routing level approach for fingerprinting FPGA digital designs has been introduced [Lac98] In the software domain, good survey of techniques for copyright protection of programs ....

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. Design Automation Conference, 1998.

....of artifacts has received great attention in the research community. A variety of techniques have been proposed for hiding data in images [Ber96, Cox96] audio [Ben96, Cox96] text [Ber96] and video [Har97] Protocols for watermarking active IP have been developed at the physical layout [Kah98] and behavioral specification [Hon98] level. A routing level approach for fingerprinting FPGA designs has been introduced [Lac98] Embedding signatures into a design at the logic synthesis level has advantages over corresponding efforts at the higher and lower levels of the design process. ....

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. Design Automation Conference, 1998.

....information into each copy, pirated data can be traced back to its original purchaser. This approach has been applied to a wide range of media: images [3, 4] audio [1] video, etc. More recently, intellectual property protection problems related to VLSI design, such as placement and routing [5] and implementations of finite state machines [7] have also been addressed in this fashion. In addition, there are cryptographic protocols which address related issues, such as how to distribute copies with guarantees of anonymity and reliable authentication [8, 9] In this paper, we study the ....

A. B. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang, and G. Wolfe. Robust IP watermarking methodologies for physical design. In Proceedings of the 35th Annual Design Automation Conference, pages 782--787, San Francisco, CA, June 1998.

.... techniques have also been developed [14,15] Recently, a set of techniques has been proposed for the protection of digital circuit IP through watermarking at various levels in the design hierarchy using the superimposition of additional constraints in conjunction to those specified by the user [16,17,18,19,20,21,22]. In this paper, we propose the first fingerprinting technique for FPGA designs. The majority of intellectual property is already programmable components, and all economic and historical trends indicate that the importance of these components will continue to rise. Cryptography is used for ....

Kahng, A.B. et al., "Robust IP Watermarking Methodologies for Physical Design," Design Automation Conference, pp. 782-787, 1998.

....The process used for managing watermarks must not necessarily be proprietary, while the code used in the encryption process should be secret for any released IP. Recently, watermarking has been applied to digital audio visual IPs [2, 3] Similar schemes have also been proposed for electronic IPs [4, 5, 6, 7]. At least two types of watermarking schemesexist. The first scheme, known as active watermarking, consists of integrating the watermark as a part of the design process, thus allowing the creation of an arbitrarily high number of unique watermarks. The second scheme, known as passive watermarking, ....

A. Kahng, S. Mantik, I. L. Markov,M. Potkonjak,P. Tucker, H. WangandG. Wolfe, "Robust IP WatermarkingMethodologies for Physical Design", in Proc. IEEE/ACM Design Automation Conference, pp. 782--787, June 1998.

.... the difficulties in core based system design, as one of the crucial enabling technology, the Virtual Socket Initiative Alliance has identified the IP protection (IPP) VSI97] The problem of effective protection of IP in the EDA environment has been addressed at the level of physical design [Kah98], behavioral specification [Hon98] and combinational logic synthesis [Kir98] level. Although all techniques enable reliable and exceptionally strong proof of authorship with little or no hardware overhead, their accompanying detection mechanisms are: ffl Expensive. Almost all techniques rely on ....

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. To appear, Design Automation Conference, 1998.

....been proposed [1,2,4] Video stream protection techniques have also been developed [9,20] Techniques have arisen that provide general intellectual property protection through watermarking. Marks are embedded at the behavioral level down to the physical layout by imposing design constraints [3,10,12,13]. A different set of synthesis and optimization issues arises when applying marks at different design phases (physical synthesis of FPGA based design vs. behavioral synthesis) Addressing the design at a lower level of abstraction provides the advantage of a larger design space and greater ....

A.B. Kahng et al., "Robust IP Watermarking Methodologies for Physical Design," Design Automation Conference, 1998, 782-787.

.... design integration, standardized on chip bus, manufacturing related test, system level design, and intellectual property protection (IPP) VSI97] Recently a number of techniques have been proposed for IPP of designs and tools at various design levels: design partitioning [Wol98] physical layout [Kah98], combinational logic synthesis [Kir98, Lac98] behavioral synthesis [Qu98, Hon98] and design for test [Kir98t] All these techniques facilitate augmentation of the user s digital signature, encoded as a set of additional design constraints, into the original design specification in a ....

....resulted in a suite of approaches for watermarking video, mainly MPEG2 [Spa96, Har97] As explicitly stated, none of these techniques can be applied to watermark active IP: designs or programs. Protocols for watermarking active IP have been developed at the physical layout [Wol98] partitioning [Kah98], logic synthesis [Kir98] partial scan selection [Kir98t] and behavioral specification [Qu98, Hon98] level. A routing level approach for fingerprinting FPGA digital designs has been introduced [Lac98] It applies encrypted marks to the design in order to support identification of the design ....

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. Design Automation Conference, 1998.

No context found.

A. B. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang, and G. Wolfe, "Robust IP watermarking methodologies for physical design, " in Proc. ACM/IEEE Design Automation Conf., June 1998, pp. 782--787.

....watermarking, translates the to be embedded signature into a set of additional constraints during the design and implementation of IP in order to uniquely encode the signature into the IP. This has been effectively applied at the level of behavior[6] logic synthesis and physical design[7], as well as in FPGA [9] Random graphs play a very important role in many fields of computer science. The two most frequently occurring models of random graphs are G#n; M# and G#n; p#. The first consists of all graphs with n vertices and M edges, the second consists of all graphs with n vertices ....

A.B.Kahng, S.Mantik, I.L.Markov, M.Potkonjak, P.Tucker, H.Wang and G.Wolfe. Robust IP Watermarking Methodologies for Physical Design. 35th Design Automation Conference Proceedings, pp. 782787, 1998

....ACM 1 58113 188 7 00 0006. 5.00 preserving their functionality. The two main strategies that have been proposed are horizontal and vertical watermarking. In the horizontal watermarking, the design software is structurally altered by a preprocessing or a post processing step during its creation [Kah98, Oli99]. In the vertical approach, the watermark is embedded during a synthesis or compilation step. The specification of the design at one process level is augmented with additional design constraints that correspond to a message. Therefore, after the synthesis step, the design has structural properties ....

Kahng, A.B.; Mantik, S.; Markov, I.L.; Potkonjak, M.; and others. "Robust IP watermarking methodologies for physical design". Proceedings of 35th Design and Automation Conference, p. 782-7, 1998

....as the related IPP model, there are two basic types of legal entities involved in an IP transation: provider (seller, owner)and buyer (user) The goal of IPP is to protect the rights of both the provider and the buyer. Recently, a number of watermarking based IPP techniques have been proposed [8, 10, 12]. All of these techniques are based on a single fundamental concept, namely, to translate the provider s signature as additional design constraints and add these constraints into the design process. The effectiveness of this concept has been shown at various stages of the VLSI design process ....

....fundamental concept, namely, to translate the provider s signature as additional design constraints and add these constraints into the design process. The effectiveness of this concept has been shown at various stages of the VLSI design process ranging from behavioral synthesis to physical design [8, 10, 12, 13]. However, no protection for the IP buyer is afforded. To discourage piracy and unauthorized redistribution, it is not enough to protect the ownership rights of the IP provider: the buyer s legal ownership of a given piece of IP must symmetrically be protected as well. The IP provider desires the ....

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A. B. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang and G. Wolfe, "Robust IP Watermarking Methodologies for Physical Design", Proc. ACM/IEEE Design Automation Conference, June 1998, pp. 782-787.

No context found.

A.B. Kahng et al. Robust IP Watermarking Methodologies for Physical Design. To appear, 35th Design Automation Conference, 1998.

No context found.

A. Kahng, S. Mantik, I. Markov, M. Potkonjak, P. Tucker, H. Wang, and G. Wolfe, "Robust IP watermarking methodologies for physical design," in Proc. Design Automation Conf., 1998, pp. 782--787.

No context found.

A. B. Kahng, S. Mantik, I. L. Markov, M. Potkonjak, P. Tucker, H. Wang, and G. Wolfe, "Robust IP watermarking methodologies for physical design," in Proceedings of the ACM/IEEE Design Automation Conference. Piscataway, NJ: IEEE Press, 1998, pp. 782--787.

No context found.

A. Kahng, S. Mantik, I. Markov, M. Potkonjak, P. Tucker, H. Wang, and G. Wolfe, "Robust IP watermarking methodologies for physical design," in Proc. Design Automation Conf., 1998, pp. 782--787.

No context found.

A.B. Kahng, S. ManIlk, I.L. Markov, M. Potkonjak, P. Tucker, H. Wang and G. Wolfe, "Robust IP watermarking methodologies for physical design," Proc. ACI/IEEt' Design Automation Conf, pp. 782-787, June 1998.

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