Paul S. Miner. Hardware Verification using Coinductive Assertions. PhD thesis, Indiana University, Bloomington, 1998. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
A Systematic Incrementalization Technique and its.. - Johnson, Liu, Zhang (1999) (Correct)
....and others have investigated an integrated framework for formalized design in which a derivational tool, DDD, interacts with theorem prover, in this instance PVS. It is demonstrated in [2, 1] that such a heterogeneous framework reduces the effort of verifying a microprocessor implementation. In [6, 14], a more tightly coupled relationship between a derivational and deductive formalisms is explored. Both DDD and CACHE are design derivation tools, operating on similar, but not, identical formal languages. In the main, they apply to different aspects of design, so it is reasonable to consider ....
Paul S. Miner. Hardware Verification using Coinductive Assertions. PhD thesis, Computer Science Department, Indiana University, USA, 1997. To appear shortly.
A Systematic Incrementalization Technique and its.. - Johnson, Liu, Zhang (Correct)
....Johnson, Bose, Miner, and others have investigated an integrated framework for formalized design in which a derivational tool, DDD, interacts with a theorem prover. It is demonstrated in [2,1] that such a heterogeneous framework reduces the effort of verifying a microprocessor implementation. In [7,15], Miner explores a more tightly coupled relationship between a derivational and deductive formalisms. These studies raise basic Johnson, Liu Zhang: Incrementalization for hardware 3 questions about the character of interaction as reflected in the analysis tools. The past few years have seen ....
....For instance, elimination of the loop index, i is done in there, rather than in the algorithm. Formal derivation and subsequent refinement of a correct architecture for Figure 1 is straightforward in the DDD algebra. Numerous examples at a similar level of abstraction have been published [6,2,15]. However, one future direction for this work is to compare performing refinements on the behavioral and architectural sides. CACHET is a research prototype developed, primarily, to investigate and demonstrate incrementalization algebra. We are only beginning to explore its use as an interactive ....
Paul S. Miner. Hardware Verification using Coinductive Assertions. PhD thesis, Computer Science Department, Indiana University, USA, 1997. To appear shortly.
A Systematic Incrementalization Technique and Its.. - Johnson, Liu, Zhang (Correct)
....Johnson, Bose, Miner, and others have investigated an integrated framework for formalized design in which a derivational tool, DDD, interacts with a theorem prover. It is demonstrated in [2,1] that such a heterogeneous framework reduces the effort of verifying a microprocessor implementation. In [7,15], Miner explores a more tightly coupled relationship between a derivational and deductive formalisms. These studies raise basic Johnson, Liu Zhang: Incrementalization for hardware 3 questions about the character of interaction as reflected in the analysis tools. The past few years have seen ....
....For instance, elimination of the loop index, i is done in there, rather than in the algorithm. Formal derivation and subsequent refinement of a correct architecture for Figure 1 is straightforward in the DDD algebra. Numerous examples at a similar level of abstraction have been published [6,2,15]. However, one future direction for this work is to compare performing refinements on the behavioral and architectural sides. CACHET is a research prototype developed, primarily, to investigate and demonstrate incrementalization algebra. We are only beginning to explore its use as an interactive ....
Paul S. Miner. Hardware Verification using Coinductive Assertions. PhD thesis, Computer Science Department, Indiana University, USA, 1997. To appear shortly.
Formal Verification of Time-Triggered Systems - Pike (2006) Self-citation (Miner) (Correct)
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Paul S. Miner. Hardware Verification using Coinductive Assertions. PhD thesis, Indiana University, Bloomington, 1998.
NASA Langley's Research and Technology-Transfer.. - Butler.. (1998) (8 citations) Self-citation (Paul) (Correct)
....verifying design optimizations. A general mechanized support for reasoning about streams (within theorem proving system PVS has been developed and demonstrated this approach on two significant case studies: 1) Fault Tolerant Clock Synchronization Circuit [91, 88] and, 2) Floating Point Division[87] . 4.3.3 PVS Libraries There is a sizable effort associated with the development of the background mathematical theories needed for any particular problem domain. These libraries provide fundamental definitions that are usually taken for granted by a domain expert. For example, fault tolerant ....
Miner, Paul S.: Hardware Verification using Coinductive Assertions. PhD thesis, Computer Science Department, Indiana University, USA, 1997.
[48] Steven D. Johnson. Digital Design in a Functional.. - Formal Aspects Of (Correct)
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Paul S. Miner. Hardware Verification using Coinductive Assertions. PhD thesis, Computer Science Department, Indiana University, USA, June 1998. Technical Report No. 510, 138 pages. ftp://ftp.cs.indiana.edu/pub/techreports/TR510.ps.Z
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