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N. Topham and A. Gonzalez. Randomized cache placement for eliminating conflicts. IEEE Transactions on Computers, 48(2):185--191, Feb. 1999.

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Theoretical Use of Cache Memory as a Cryptanalytic Side-Channel - Page (2002)   (6 citations)  (Correct)

....potential in a given algorithm. If the algorithm under attack has very few accesses to memory which can be reordered, due to dependencies for example, the whole scheme will be ineffective in guarding against CBA. 5. 4 Non deterministic Cache Placement The use of randomised cache mapping policies [25] has been proposed as a method of avoiding cache conflict caused by, for example, strided access patterns. This sort of scheme works by introducing some skew in how a cache line is determined from the address so that over time, the same address will be mapped into different lines. This sort of ....

N.P. Topham and A. Gonzalez. Randomized Cache Placement for Eliminating Conflicts. IEEE Transactions on Computers, 48(2):185--192, 1999.


Evaluation of the Performance of Polynomial Set Index.. - Vandierendonck, De.. (2002)   (1 citation)  (Correct)

....function when we mean randomising set index function. Although some work has shown the benefits of randomisation functions, architects are left with the implausible task of selecting just one randomisation function to implement in a processor. Few papers provide help on this task. In [6, 7, 14, 15], the class of functions based on division of polynomials over GF (2) originally proposed for interleaved memories in vector processors [10] is promoted for use as set index functions for data caches. The performance of these functions in the presence of stride based access patterns can be shown ....

....XOR based randomisation functions are made. Furthermore, it is claimed that polynomials that are irreducible, which means that they cannot be written as the product of other polynomials, will lead to even less conflict misses, although no experimental evidence is presented to support this claim [6, 7, 14, 15]. allfunctions XOR based functions Unique XOR based functions polynomials irreducible polynomials Figure 1. Different classes of randomisation functions. The space of randomisation functions, together with some sub classes of functions are shown in Figure 1. Functions outside the class ....

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N. Topham and A. Gonzalez. Randomized cache placement for eliminating conflicts. IEEE Transactions on Computers, 48(2):185--192, Feb. 1999.


Theoretical Use of Cache Memory as a Cryptanalytic Side-Channel - Page (2002)   (6 citations)  (Correct)

....potential in a given algorithm. If the algorithm under attack has very few accesses to memory which can be reordered, due to dependencies for example, the whole scheme will be ineffective in guarding against CBA. 4. 4 Non deterministic Cache Placement The use of randomised cache mapping policies [15] has been proposed as a method of avoiding cache conflict caused by, for example, strided access patterns. This sort of technique offers high performance while adding a level of non determinism to the system by changing the mapping function between runs of an algorithm. We can use this property ....

N.P. Topham and A. Gonzalez. Randomized Cache Placement for Eliminating Conflicts. IEEE Transactions on Computers, 48(2):185--192, 1999.


Data Caches for Multithreaded Processors - Montse Garca Jos   Self-citation (Gonzlez)   (Correct)

....In this section the different cache configurations are described and compared with conventional data caches. First, we study conventional caches using two families of placement functions: modulus functions and XORbased placement functions. We have chosen the bitwise XOR mapping function [6][7][8] 9] because of its simplicity and its potential to reduce many conflict misses. After analyzing the results, we propose several data cache architectures to further decrease the miss ratio. The data cache architectures that we have considered differ in the number of indexing functions, the ....

....percentage of interthread misses (from 75 for DMm to 65 of 4wAm) As pointed out before, inter thread misses are one of the major bottlenecks in data caches for multithreaded processors. On the other hand, XOR based placement functions are powerful mechanism for reducing conflict misses [6][7], so we applied them to the data cache in order to evaluate their potential for reducing these critical misses. Figure 3 shows the miss ratio as a function of the placement function used to access cache. We have evaluated direct mapped and two way set associative caches. Figure 3 shows that the ....

N. Topham and A. Gonzlez "Randomized Cache Placement for Eliminating Conflicts", in IEEE Transactions on Computer, 48(2), 1999, pp 185-192


Data Caches for Multithreaded Processors - García, González, González (2000)   Self-citation (Gonzlez)   (Correct)

....In this section the different cache configurations are described and compared with conventional data caches. First, we study conventional caches using two families of placement functions: modulus functions and XOR based placement functions. We have chosen the bitwise XOR mapping function [6][7][8] 9] due to its simplicity and its potential to reduce many conflict misses. After analyzing the results, we propose several data cache architectures to further decrease the miss ratio. The data cache architectures that we have considered differ in the number of indexing functions, the ....

....of inter thread misses (from 75 for DMm to 65 of 4wAm) As pointed out before, inter thread misses become one of the major bottlenecks in data caches for multithreaded processors. On the other hand, XOR based placement functions have been shown as a powerful mechanism to reduce conflict misses [6][7], so we have applied this mapping function to the data cache in order to evaluate its potential to reduce these critical misses. Figure 3 shows the miss ratio as a function of the placement function used to access cache. We have evaluated direct mapped and two way set associative caches. Looking ....

N. Topham and A. Gonzlez "Randomized Cache Placement for Eliminating Conflicts", in IEEE Transactions on Computer, 48(2), 1999, pp 185-192


A Statistical Model of Skewed-Associativity - Pierre Michaud Irisa   (Correct)

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N. Topham and A. Gonzalez. Randomized cache placement for eliminating conflicts. IEEE Transactions on Computers, 48(2):185--191, Feb. 1999.

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