SIGMUND, U., AND UNGERER, T. Memory hierarchy studies of multimediaenhanced simultaneous multithreaded processors for MPEG-2 video decompression. In Proceedings of the Workshop on Multithreaded Execution, Architecture and Compilation (August 2000). Home/Search Document Details and Download
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An Analysis of Software Interface Issues for SMT Processors - Redstone (2002) (1 citation) (Correct)
....running on Windows NT; their characterization is limited to summaries based on the hardware performance counters. Previous studies have evaluated SMT under a variety of application level workloads. Some workloads examined include SPEC (92 and 95) 82, 81] SPLASH 2 [44] MPEG 2 decompression [68] and a database workload [43] Evaluations of other multithreading 52 and CMP architectures have similarly been limited to application code only [3, 35, 15, 2, 71, 41, 30] or PALcode [91] Our study is the first to measure operating system behavior on a simultaneous multithreading architecture. ....
SIGMUND, U., AND UNGERER, T. Memory hierarchy studies of multimediaenhanced simultaneous multithreaded processors for MPEG-2 video decompression. In Proceedings of the Workshop on Multithreaded Execution, Architecture and Compilation (August 2000).
An Analysis of Operating System Behavior on a.. - Redstone, Eggers, Levy (2000) (9 citations) (Correct)
....each cycle. SMT works by converting thread level parallelism into instruction level parallelism, effectively feeding instructions from different threads into the functional units of a wide issue, out of order superscalar processor [42, 41] Over the last six years, SMT has been broadly studied [22, 23, 21, 45, 24, 43, 35] and Compaq has recently announced that the Alpha 21464 will include SMT [10] As a general purpose throughputenhancing mechanism, simultaneous multithreading is especially well suited to applications that are inherently multithreaded, such as database and Web servers, as well as multiprogrammed ....
....running on Windows NT; their characterization is limited to summaries based on the hardware performance counters. Previous studies have evaluated SMT under a variety of application level workloads. Some workloads examined include SPEC (92 and 95) 42, 41] SPLASH 2 [22] MPEG 2 decompression [35] and a database workload [21] Evaluations of other multithreading and CMP architectures have similarly been limited to application code only [3, 18, 6, 2, 37, 20, 14] or PALcode [47] Our study is the first to measure operating system behavior on a Metric SMT Superscalar Apache only Apache OS ....
U. Sigmund and T. Ungerer. Memory hierarchy studies of multimedia-enhanced simultaneous multithreaded processors for MPEC-2 video decompression. In Workshop on MultiThreaded Execution, Architecture and Compilation, January 2000.
On Performance, Transistor Count and Chip Space.. - Sigmund, Steinhaus.. Self-citation (Sigmund) (Correct)
....processor cycles. On the other hand, memory bus utilization is already very high, and memory bandwidth is critical for the SMT processor performance. We choose to double the cache line burst length to 32:4:4:4:4:4:4:4 instead of a costly doubling of the memory bus speed or the bus width (see [17] for a discussion of the trade offs of the memory hierarchy) The diagrams in Fig. 5 show that the required transistor count and chip space of the 4 and 8 threaded 8 issue configurations allow an implementation of these models already with contemporary VLSI technology. Threads ....
Sigmund, U., Ungerer, Th.: Memory Hierarchy Studies of Multimedia-enhanced Simultaneous Multithreaded Processors for MPEC-2 Video Decompression. Workshop on Multi-Threaded Execution, Architecture and Compilation (MTEAC-3), Toulouse, Jan. 8, 2000.
A Simulator for SMT Architectures: Evaluating.. - Goncalves.. (2000) (Correct)
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Sigmund, U., Ungerer, T., Memory Hierarchy Studies of Multimedia-enhanced Simultaneous Multithreaded Processors for MPEC-2 Video Decompression. Workshop on Multi-Threaded Execution, Architecture and Compilation (MTEAC 00), Toulouse, 8.1.2000
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