| S.G.Chamberlain, "Photosensitivity and scanning of silicon image detector arrays", IEEE JSSC, 4:333-342, 1969. |
....a 128 128 PAR capable of grey level image processing and pattern recognition with not even 50 transistors per PE. 1. INTRODUCTION As year 2000 approaches, the progress in VLSI CMOS technology has a growing influence on the techniques used for image capture and processing. It is known for long [1] that any reverse biased unsheltered diode in a standard CMOS circuit generates a reverse photonic current with fair efficiency and accuracy when submitted to visible radiation. But, while pixel size in imaging arrays remains lowerbounded to at least several microns due to hard optical ....
S.G.Chamberlain, "Photosensitivity and scanning of silicon image detector arrays", IEEE JSSC, 4:333-342, 1969.
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