| F. Paillet, D. Mercier, and T.M. Bernard. Second generation programmable artificial retina. In Proc. IEEE ASIC Conf., pages 304--309, September 1999. |
.... output of pixel coordinates, results from images processed in large size digital PARs (Programmable Artificial Retinas) These PARs are single chip optical sensors composed of an SIMD 1 array processor with optical input: a tiny processor is embedded in each pixel of a CMOS image sensor [7]. 1. INTRODUCTION Parallelism is nowadays a common way to increase performance both at the circuit and system level. Structures exhibiting very high level of parallelism often carry out computations using local communication only. So do 2 D SIMD array processors dedicated to image processing, ....
F. Paillet, D. Mercier, and T.M. Bernard. Second generation programmable artificial retina. In Proc. IEEE ASIC Conf., pages 304--309, September 1999.
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