K. Kusumoto, A.Ma)GR) wa ,a) K.Mura=L "A 10-b20MHz 30-mW pipelined interpolab)) CMOS ADC," IEEE J.Solid-StaG Circuits, vol.28, no.12, pp.1200--1206, 1993.

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A Low-PowerA/D Conversion Technique Using Correlation of.. - Shoji Kawahi Member   (Correct)

....########### 1. I troduction A D convertL for video signals relats ely consumes large power, because such high speed A D convertO7 use large number ofcomparat L for tr parallel operat q The resolutfi of 8t o 10bit and td sampling frequency of 10 t 30 MHz aret ypical for video A D convertx [1]. Video signal processing such as gamma correctI#9 whit balancing and apert4O correctfi is recentc performed indigitO domain, and tdq requires higherresolutOI around 12bit in A D conversiont obtio tt su#cient SNR [2] Highdefinit#x images are becoming popular even in consumer productI The ....

K. Kusumoto, A.Ma)GR) wa ,a) K.Mura=L "A 10-b20MHz 30-mW pipelined interpolab)) CMOS ADC," IEEE J.Solid-StaG Circuits, vol.28, no.12, pp.1200--1206, 1993.

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