T. Yeh and Y. Patt, "Two-level Adaptive Branch Prediction, " Proc. 24th Annual ACM/IEEE Intl. Symp. and Workshop on Microarchitecture, Nov. 1991. Home/Search Document Not in Database Summary Related Articles Check |
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Neural Methods for Dynamic Branch Prediction - Jimenez, Lin (2002) (2 citations) (Correct)
....2 Related Work In this section, we explore related work in dynamic branch prediction and neural systems. 2.1 Dynamic Branch Prediction Dynamic branch prediction has been the focus of intense study in the literature. Recent research focuses on refining the two level scheme of Yeh and Patt [32]. In this scheme, a pattern history table (PHT) of two bit saturating counters is indexed by a combination of branch address and global or per branch history. The high bit of the counter is taken as the prediction. Once the branch outcome is known, the counter is incremented if the branch is ....
T.-Y. Yeh and Yale N. Patt. Two-level adaptive branch prediction. In Proceedings of the 24 ACM/IEEE Int'l Symposium on Microarchitecture, November 1991. 23
A Two-Tiered Software Architecture for Automated.. - Salmon, Thereska.. (2003) (2 citations) (Correct)
....patterns. Unlike our system, however, their system works to determine which single heuristic to use for the particular workload, rather than combining the suggestions of multiple heuristics. Similar schemes have been used in other domains as well, such as branch prediction in modern processors [13, 24]. 3. TWO TIEREDLEARNINGFORLAYOUT This work focuses on the problem of identifying a disk layout that improves performance for a given workload. At the most general level, this is a learning problem that takes as input a workload and outputs a new layout. However, due to the size of the state ....
T-YYeh and Y. N. Patt. Two-level adaptive branch prediction. 24th ACM/IEEE International Symposium and Workshop on Microarchitecture, pages 51--61, 1991.
Power-Aware Control Speculation through Selective Throttling - Aragón, González, González (2003) (1 citation) (Correct)
....of our proposal. Finally, Section 6 summarizes the main conclusions of this work. 2. Background and Related Work A very large body of research has been targeted at reducing the performance degradation caused by branch mispredictions. Many proposals try to improve branch prediction accuracy [29][22] 10] 2] Others try to minimize performance degradation by fetching and or executing multiple paths [15] 19] 28] 3] However, analyzing how mis speculated instructions influence energy consumption has not received much attention. As mentioned above, Pipeline Gating [21] prevents wrong path ....
T.Y. Yeh and Y.N. Patt. "Two-Level Adaptive Branch Prediction". Proc. of the Int. Symp. on Microarchitec., 1991.
Reconsidering Complex Branch Predictors - Jimenez (2003) (2 citations) (Correct)
....review a few of the branch predictors in industrial designs, in chronological order of their introduction. As we will see, industrial branch predictor designs have become more and more complex in recent years: The Alpha EV6 core uses a hybrid branch predictor composed of two two level predictors [9, 20]. A 4Kentry PHT is indexed by a global history register while a 1K entry PHT is indexed by one of 1024 local 10 bit branch histories. The final branch prediction is chosen by indexing a third chooser PHT. its implementation complexity comes with a cost. The Alpha branch predictor overrides a less ....
T.-Y. Yeh and Yale N. Patt. Two-level adaptive branch prediction. In Proceedings of the 24 ## ACM/IEEE Int'l Symposium on Microarchitecture, pages 51--61, November 1991.
Power-Aware Control Speculation through Selective Throttling - Juan Arag Josogonzz (2003) (1 citation) (Correct)
....of our proposal. Finally, Section 6 summarizes the main conclusions of this work. 2. Background and Related Work A very large body of research has been targeted at reducing the performance degradation caused by branch mispredictions. Many proposals try to improve branch prediction accuracy [29][22] 10] 2] Others try to minimize performance degradation by fetching and or executing multiple paths [15] 19] 28] 3] However, analyzing how mis speculated instructions influence energy consumption has not received much attention. As mentioned above, Pipeline Gating [21] prevents wrong path ....
T.Y. Yeh and Y.N. Part. Two-Level Adaptive Branch Prediction . Proc. of the lnt. Symp. on Microarchitec., 1991.
Delay-Sensitive Branch Predictors for Future Technologies - Jimenez (2002) Self-citation (Patt) (Correct)
....and instruction throughput. This delay is affected by trends in technology. In this section, we explain the source of branch predictor delay and the consequences of ignoring delay. Modern branch predictors are based on the two level adaptive branch prediction technique introduced by Yeh and Patt [62]. This scheme uses a table of counters to find correlations between previous branch outcomes to make a prediction. For the branch predictor to be accurate, this table should have hundreds or thousands of entries, causing it to resemble a small cache memory. In the past three decades, performance ....
....moderately accurate, but as branch misprediction penalties started to increase, more accurate techniques became necessary. An important breakthrough came in 1991 when Yeh and Patt observed that the outcome of a given branch is often highly correlated with the outcomes of other recent branches [62]. This history of branch outcomes forms a pattern that can be used to provide a dynamic context for prediction. Most modern branch predictors are based on this pattern history. In the scheme of Yeh and Patt, every time a branch outcome becomes known, a single bit (0 for not taken, 1 for taken) is ....
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T.-Y. Yeh and Yale N. Patt. Two-level adaptive branch prediction. In Proceedings of the 24 ACM/IEEE Int'l Symposium on Microarchitecture, November 1991. 144
Improving Branch Prediction Performance with A Generalized .. - Lin, Madhavaram, Yang (2005) (Correct)
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T. Yeh and Y. Patt, "Two-level Adaptive Branch Prediction, " Proc. 24th Annual ACM/IEEE Intl. Symp. and Workshop on Microarchitecture, Nov. 1991.
Improving Branch Prediction Performance with a Generalized .. - Lin, Madhavaram, Yang (2005) (Correct)
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T. Yeh and Y. Patt, "Two-level Adaptive Branch Prediction, " Proc. 24th Annual ACM/IEEE Intl. Symp. and Workshop on Microarchitecture, Nov. 1991.
Improving Branch Prediction Performance with a Generalized .. - Lin, Madhavaram, Yang (2005) (Correct)
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T. Yeh and Y. Patt, "Two-level Adaptive Branch Prediction, " Proc. 24th Annual ACM/IEEE Intl. Symp. and Workshop on Microarchitecture, Nov. 1991.
Improving Branch Prediction Performance with a Generalized .. - Lin, Madhavaram, Yang (2005) (Correct)
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T. Yeh and Y. Patt, "Two-level Adaptive Branch Prediction, " Proc. 24th Annual ACM/IEEE Intl. Symp. and Workshop on Microarchitecture, Nov. 1991.
Challenges in Building a Two-Tiered Learning.. - Salmon, Thereska, .. (2004) (Correct)
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T-YYeh and Y. N. Patt. Two-level adaptive branch prediction. 24th ACM/IEEE International Symposium and Workshop on Microarchitecture (November 1991.
Neural Methods for Dynamic - Branch Prediction Daniel (Correct)
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YEH, T.-Y. AND PATT, Y. N. 1991. Two-level adaptive branch prediction. In Proceedings of the 24th ACM/IEEE International Symposium on Microarchitecture, 51--61.
Code Placement for Improving Dynamic Branch Prediction - Accuracy Daniel Jimenez (Correct)
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T.-Y. Yeh and Y. N. Patt. Two-level adaptive branch prediction. In Proceedings of the 24th ACM/IEEE International Symposium on Microarchitecture, pages 51--61, November 1991.
In Proceedings of the 4th International Symposium on.. - May.. (Correct)
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Tse-Yuh Yeh and Yale N. Patt. Two-level adaptive branch prediction. Proceedings of the 24th Annual ACM/IEEE Intl. Symposium on Microarchitecture, pages 51-- 61, 1991.
Analysis of Dynamic History Length Changes Effect.. - Falcon, Santana.. (2002) (Correct)
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Tse-Yuh Yeh and Yale N. Patt. Two-level adaptive branch prediction. Proceedings of the 24th Annual ACM/IEEE Intl. Symposium on Microarchitecture, pages 51--61, 1991.
Combining Hyperblocks and Exit Prediction to.. - Ranganathan.. (2002) (Correct)
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T.-Y. Yeh and Y. Patt. Two-level adaptive branch prediction. In Proceedings of the 24th International Symposium on Microarchitecture, pages 51--61, 1994. 27
Boolean Formula-based Branch Prediction for Future.. - Daniel Jimenez Heather (2001) (3 citations) (Correct)
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T.-Y. Yeh and Y. Patt. Two-level adaptive branch prediction. In the 24 Int'l Symp. on Microarchitecture, Nov. 1991.
Journal of Instruction-Level Parallelism 5(2003) 1-23.. - Gabriel Loh Loh (Correct)
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Tse-Yu Yeh and Yale N. Patt. Two-Level Adaptive Branch Prediction. In Proceedings of the 24th International Symposium on Microarchitecture, pages 51--61, Albuqueque, NM, USA, November 1991.
High-Performance Frontends for Trace Processors - Jacobson (1999) (Correct)
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T.-Y. Yeh and Y. Patt, " Two-Level Adaptive Branch Prediction," in Proceedings of the 24th International Symposium on Microarchitecture, pp. 51-61, November 1991.
Dynamic Feature Selection for Hardware Prediction - Alan Fern Robert (2000) (6 citations) (Correct)
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Tse-Yu Yeh and Yale N. Patt. Two-level adaptive branch prediction. In Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 24), pages 51--61, December 1991.
Determining Execution Frequencies of - Instructions Without Profiling (Correct)
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T. Yeh and Y.N. Patt. Two-level adaptive branch prediction. In Proceedings of the 24th Annual ACM/IEEE International Symposium and Workshop on Microarchitecture, pages 51--61, November 1991.
Journal of Instruction-Level Parallelism 5(2003) 1-32.. - Branch Predictors.. (Correct)
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T.-Y. Yeh and Y. N. Patt, "Two-Level Adaptive Branch Prediction," in Proceedings of the 24th International Symposium on Microarchitecture, (Albuqueque, NM, USA), pp. 51--61, November 1991. 27
Instruction Cache Address Prediction for - Superscalar Processors In (1999) (Correct)
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Yeh, T., and Patt, Y. Two-level Adaptive Branch Prediction. 24th ACM/IEEE International Symposium on Microarchitecture (November 1991). 56
Analysis and Evaluation of the Multi-Stage Cascaded.. - Santana, Falcón.. (2001) (Correct)
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T. Y. Yeh and Y. Patt. Two level adaptive branch prediction. Proceedings of the 24th Annual International Symposium on Microarchitecture, pp. 51-61, 1991.
Instruction Fetch Architectures and Code Layout.. - Ramirez, Larriba-Pey.. (Correct)
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T. Y. Yeh and Y. N. Patt, \Two-level adaptive branch prediction, " Proceedings of the 24th Annual ACM/IEEE Intl. Symposium on Microarchitecture, pp. 51-61, 1991.
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