Alpha Architecture Reference Manual, Richard L. Sites (ed.), Digital Press, Burlington, Massachusetts, 1992. Order number EY-L520E-DP.  Home/Search   Document Not in Database   Summary   Related Articles

....sequence of instructions that needs to execute without interference are fundamental to concurrent programs, including operating systems. 1 For this reason, processors generally provide synchronization primitives, such as test and set or compare and swap in their instruction set architecture [2, 3, 4, 5, 6, 7, 8]. Due to the trend of implementing processors that are suitable for use in shared memory multiprocessors, these primitives have become quite expensive. For example, the Alpha architecture [7] provides a multiprocessor safe load linked store conditionally instruction that, on some uniprocessors, ....

....such as test and set or compare and swap in their instruction set architecture [2, 3, 4, 5, 6, 7, 8] Due to the trend of implementing processors that are suitable for use in shared memory multiprocessors, these primitives have become quite expensive. For example, the Alpha architecture [7] provides a multiprocessor safe load linked store conditionally instruction that, on some uniprocessors, requires Author s current address: Department of Computer Science, Rice University, P.O. Box 1892, Houston, TX 77251, USA y This work supported in part by ARPA Contract DABT63 91 C 0030, by ....

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Alpha Architecture Reference Manual, Richard L. Sites (ed.), Digital Press, Burlington, Massachusetts, 1992. Order number EY-L520E-DP.

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