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Mansouri, N. and R. Vemuri: 1998, `A Methodology for Completely Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool'. Proceedings of International Conference on Formal Methods in Computer-Aided Design.

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This paper is cited in the following contexts:
Automated Correctness Condition Generation for Formal.. - Mansouri, Vemuri (1999)   Self-citation (Mansouri Vemuri)   (Correct)

....level (rtl) designs from algorithmic behavioral specifications (Figure 1) 19, 15, 48, 8, 53, 26] The rtl design consists of a data path and a controller. This paper is an extension to the work presented in the International Conference on Formal Methods in Computer Aided Design [29], Nov 1998. c fl 1999 Kluwer Academic Publishers. Printed in the Netherlands. The data path consists of component instances selected from an rtl component library. The controller is a finite state machine (fsm) description subject to down stream fsm synthesis. High level synthesis process begins ....

Mansouri, N. and R. Vemuri: 1998, `A Methodology for Completely Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool'. Proceedings of International Conference on Formal Methods in Computer-Aided Design.


Accounting for Various Register Allocation Schemes During.. - Mansouri, Vemuri   Self-citation (Mansouri Vemuri)   (Correct)

....on rewriting strategies, and as a consequence, designs of larger size can be verified. Moreover, the necessary rewriting steps can be automatically generated by making use of the variable and state binding information. We proposed a similar approach for verification of register level designs in [13], where verification can be integrated with synthesis systems which perform little or no register optimization. We extend the class of verifiable designs by accommodating various register allocation optimization schemes. We focus on transformations which may be performed at register allocation ....

Nazanin Mansouri, Ranga Vemuri, "A Methodology for Completely Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool", to appear in International Conference on Formal Methods in Computer-Aided Design, Palo Alto, CA, 1998.

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