Fault-Tolerant Systems, IEEE Computer special issue 23 7 (1990). Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Controlling Memory Access Concurrency in Efficient.. - Kanellakis.. (1993) (1 citation) (Correct)
....writes [21] We also handle arbitrary initialization of the shared memory , which is assumed clear in the fault free PRAM model. This extends 3 above. The abstract model that we are studying can be realized in the architecture of Fig. 1. Fault tolerant technologies, such as those in surveys [11, 17, 18], all contribute towards concrete realizations of its components. a. There are P fail stop processors (see [34] each with a unique address and some local memory. b. There are Q shared memory cells, the input of size N Q is stored in shared memory. These semiconductor memories can be ....
Fault-Tolerant Systems, IEEE Computer special issue 23 7 (1990).
Controlling Memory Access Concurrency in Efficient.. - Kanellakis.. (1993) (1 citation) (Correct)
....writes [21] We also handle arbitrary initialization of the shared memory , which is assumed clear in the fault free PRAM model. This extends 3 above. The abstract model that we are studying can be realized in the architecture of Fig. 1. Fault tolerant technologies, such as those in surveys [11, 17, 18], all contribute towards concrete realizations of its components. a. There are P fail stop processors (see [34] each with a unique address and some local memory. b. There are Q shared memory cells, the input of size N Q is stored in shared memory. These semiconductor memories can be ....
Fault-Tolerant Computing, IEEE Computer special issue 17 8 (1984).
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