J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, and Y. Xiong, "Overview of the Ptolemy Project," Dept. EECS, Univ. California, Berkeley, CA, ERLTech. Rep. UCB/ERL no. M99/37, July 1999.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....has been already tested in advanced industrial environments. In particular, complex system designs have been cast in this framework and implemented in the field of automotive electronic subsystems [16,17] and consumer electronics [18] Its basic aspects have been incorporated in POLIS [3] Ptolemy [19] and in an at least an industrial product [4, 5,20,21] Virtual Component Composer, and we know of other tools that are being developed based on these concepts. 4.1.1 Philips VideoTop COSY is a European Community project on system design and verification involving industry (Cadence, Philips, ....

J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, Jie Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay and Y. Xiong, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL No. M99/37, Dept. EECS, University of California, Berkeley, CA 94720, July 1999.

....engine. Simplescalar was configured with a 2 KByte level one instruction cache, with a 4 KByte levelone data cache and no second level caches. The FIFOpolicywas chosen for cache replacement. As benchmark programs, wehave used a set of DSP oriented C routines taken from the Ptolemy package [13]. 4.1 Technology Assumptions and Power Models For the experiments wehave assumed, as main memory,a4 MByte, 0:18m,2:5V ultra low power CMOS SRAM by Alliance Semiconductors. Data and address buses are 32 bit wide, and are assumed to have a line capacitanceof8pF . The length of a data word is W = ....

J. Davis II, et al., Overview of the Ptolemy Project, Tech. Rep. UCB/ERL No. M99/37, Univ. of California, Dept. of EECS, 1999.

....based on application oriented languages such as Matlab or SDL allows better trade off analysis of application relevant parameters and a better design space exploration during the design process. However, synthesis is harder with these languages because more design decisions must be made. Ptolemy [8] is a general framework that connects a large number of design domains and allows for heterogeneous cosimulation of discrete event and dataflow models. The current implementation of the communication mechanism between discrete event and dataflow domains is based on a technique that transmits ....

J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, Y. Xiong, "Overview of the Ptolemy Project ", ERL Technical Report UCB/ERL No. M99/37, University of California, Berkeley, USA, July 1999.

....[21] providenoncausalmodels; that is, there is nonotionof causality in theequationsinthemodels.Thosethreehavebeenusedmostly for describing physical objects, whereas SHIFT [22] is more like a programming language and has been used extensively to specify automated vehicle highway systems. PTOLEMY II [23] supports the modeling, simulation, and design of concurrent systems. It incorporates a number of models of computation (such as synchronous reactive systems, CSP, finite state machines, continuous time, etc) with semantics that allow domains to interoperate. All the above languages were proposed ....

....(GUI) with support for syntax directed text editing, a visual input language, a powerful type checker, simulation, and a plotter to display simulation traces. The CHARONGUI uses some components from the model checker JMOCHA [72] and the plotter uses a package from the modeling tool PTOLEMY [23]. The editor windows highlight the CHARON language keywords and comments. Parsing on the fly can be enabled or disabled. Incaseofan error while typing, the first erroneoustoken Fig. 13 The visual input tool of CHARON. The arrows depict variable renamings. will be highlighted in red. Further, ....

J. Davis, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, and Y. Xiong, "Overview of the Ptolemy Project," Univ. California Berkeley, UCB/ERL M99/37, 1999.

....partitions to set up a meaningful sample set for characterization. 4. 2 Energy Optimization The memory partitioning tool that includes the back end flow of Section 3 has been validated on a set of C programs that representtypical embedded applications, and that are distributed along with Ptolemy [15], a simulation framework for HW SW descriptions. ARMulator [16] a software emulator for core processors of the ARM family, has then been used to trace data memory accesses. Benchmark Address Partitions Savings [ Space Automatic Manual Adaptfilter 3085 [1232 1584 288] 22.02 27.55 Butterfly ....

J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay and Y. Xiong, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL No. M99/37, Dept. EECS, University of California, Berkeley, July 1999.

....Section 4 describes the modeling and simulation using SEA, and Sections 5 and 6 describe timing analysis and the scheduling allocation performed by CHaRy. Finally, a conclusion is given in Section 7. 2. Related Work Design Environments: Similar to the work presented here, the Ptolemy project [10] studies modeling, simulation, and design of concurrent real time embedded systems. The focus is on assembly of concurrent components. The underlying principle in the project is the use of well defined models of computation that govern the interaction between components. A major problem area ....

J. D. II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, and Y. Xiong. Overview of the ptolemy project. ERL Technical Report M99/37, Dept. EECS, University of California, Berkeley, CA 94720, July 1999.

....is assured the benefits of pipes, such as freedom from deadlock. The rest of the system has no such assurance. A second way to mix frameworks is hierarchically. A component in one framework is actually an aggregate of components in another. This is the approach taken in the Ptolemy project [20]. The challenge here is to avoid having to design each pairwise hierarchical combination of frameworks. The approach we take in the Ptolemy project is to use a system level type concept that we call domain polymorphism. In Ptolemy software, a model of computation is realized by a software ....

J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay and Y. Xiong, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL No. M99/37, Dept. EECS, University of California, Berkeley, CA 94720, July 1999.

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J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, and Y. Xiong, "Overview of the Ptolemy Project," Dept. EECS, Univ. California, Berkeley, CA, ERLTech. Rep. UCB/ERL no. M99/37, July 1999.

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J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay and Y. Xiong, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL No. M99/37, Dept. EECS, University of California, Berkeley, July 1999.

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J. Davis, C. Hylands, J. Janneck, E.A. Lee, J. Liu, X. Liu, S. Neuendor#er, S. Sachs, M. Stewart, K. Vissers, P. Whitaker, Y. Xiong. "Overview of the Ptolemy Project". Technical Memorandum UCB/ERL M01/11, EECS, University of California, Berkeley, March 6, 2001.

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J. Davis, M. Goel, C. Hylands, B. Kienhuis, E.A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, and Y. Xiong. Overview of the Ptolemy project. Tech. Rep. UCB/ERL M99/37, University of California, Berkeley, 1999.

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J. Davis II et al., "Overview of the Ptolemy Project", ERL Technical Report UCB/ERL No. M99/37, University of California, Berkeley, June 1999

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J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay and Y. Xiong, "Overview of the Ptolemy Project," ERL Technical Report UCB/ERL No. M99/37, Dept. EECS, University of California, Berkeley, CA 94720, July 1999.

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