Choi, L., and Chien, A. A. The design and performance evaluation of the DImulticomputer. Journal of Parallel and Distributed Computing (199x). Submitted for publication. Home/Search Document Details and Download
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The Impact of Message Traffic on Multicomputer Memory Hierarchy.. - Pakin (1995) (2 citations) (Correct)
....architectures, especially those that connect the network interface and other levels of the memory hierarchy or multiple levels of the memory hierarchy. We have already begun one such effort by starting to examine the relationship of network traffic to cache misses in the proposed DI multicomputer [7, 8], in which messages can be routed either directly from registers or memory, and the programmer or compiler chooses which is more appropriate on a per message basis. Because of the additional flexibility in the DImulticomputer scheme over the cache network and primary memory network ....
Lynn Choi and Andrew A. Chien. The design and performance evaluation of the DImulticomputer. Journal of Parallel and Distributed Computing, 199x. Submitted for publication.
MORPH: A System Architecture for Robust High Performance Using .. - Chien, Gupta (1996) (5 citations) Self-citation (Chien) (Correct)
.... Organization As mentioned earlier, the basic architecture of MORPH reflects the observations that in the 2007 technology window, 1) communication is already critical and getting increasingly so [64] and (2) flexible interconnects can be used to replace static wires at competitive performance [51, 13, 12, 22]. The key elements of the MORPH architecture include processing elements and memory elements embedded in a scalable interconnect. The scalable interconnect flexibly connects all parts of the system with fast packet routing, efficiently exploiting the wiring resources provided by the system ....
....The key elements of the MORPH architecture include processing elements and memory elements embedded in a scalable interconnect. The scalable interconnect flexibly connects all parts of the system with fast packet routing, efficiently exploiting the wiring resources provided by the system packaging [13, 12, 51, 22]. Figure 8 shows our architecture. Architectural adaptation can be used in the bindings, mechanisms, and policies on the interaction of processing, memory, and communication resources while keeping the macro level organization the same and thus preserving the programming model for developing ....
Choi, L., and Chien, A. A. The design and performance evaluation of the DImulticomputer. Journal of Parallel and Distributed Computing (199x). Submitted for publication.
Architectural Adaptation for Application-Specific.. - Zhang, Dasdan.. (1997) (3 citations) Self-citation (Chien) (Correct)
....system with the goal of customizing architectural mechanisms and policies to match an application. We base our design on the premise that communication is already critical and getting increasingly so [17] and flexible interconnects can be used to replace static wires at competitive performance [6], 9] 20] Our approach presents an improvement over co processing by preserving machine usability through software and over traditional computer architecture by providing application specific hardware assists. The goal of application specific hardware assists is to overcome the rigid ....
Choi, L., and Chien, A. A. The design and performance evaluation of the DI-multicomputer. Journal of Parallel and Distributed Computing (199x). Submitted for publication.
MORPH: A System Architecture for Robust High Performance Using .. - Chien, Gupta (1996) (5 citations) Self-citation (Chien) (Correct)
.... 3 System Architecture Organization The basic architecture of MORPH reflects the observations that in the 2007 technology window, 1) communication is already critical and getting increasingly so [19] and (2) flexible interconnects can be used to replace static wires at competitive performance [20, 21, 22, 23]. The key elements of the MORPH architecture include processing elements and memory elements embedded in a scalable interconnect. The scalable interconnect flexibly connects all parts of the system with fast packet routing, efficiently exploiting the wiring resources provided by the system ....
....The key elements of the MORPH architecture include processing elements and memory elements embedded in a scalable interconnect. The scalable interconnect flexibly connects all parts of the system with fast packet routing, efficiently exploiting the wiring resources provided by the system packaging [21, 22, 20, 23]. The hardware structure allows adaptation of data transport, coordination, association (for granularity) and efficient computation. As an example of its flexibility, MORPH could be used to implement Network Interface Programmable Logic High density High performance Memory element Programmable ....
L. Choi and A. A. Chien, "The design and performance evaluation of the DI-multicomputer," Journal of Parallel and Distributed Computing, 199x. Submitted for publication.
Architectural Adaptation for Application-Specific.. - Zhang, Dasdan.. (1997) (3 citations) Self-citation (Chien) (Correct)
....system with the goal of customizing architectural mechanisms and policies to match an application. We base our design on the premise that communication is already critical and getting increasingly so [17] and flexible interconnects can be used to replace static wires at competitive performance [6, 9, 20]. Our approach presents an improvement over co processing by preserving machine usability through software and over traditional computer architecture by providing applicationspecific hardware assists. The goal of application specific hardware assists is to overcome the rigid architectural choices ....
CHOI, L., AND CHIEN, A. A. The design and performance evaluation of the DI-multicomputer. J. Parallel and Distributed Comput, 36:119--143, 1996.
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