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S. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: Verifying di#erent facets of a system. In R. Alur and T.A. Henzinger, editors, Proc. of the 8th International Conference on Computer Aided Verification, number 1102 in LNCS, pages 257--268. Springer, 1996.

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Parametric Temporal Logic for "Model Measuring" - Alur, Etessami, Torre, Peled (1999)   (5 citations)  (Correct)

.... based on extensions of CTLlike branching time logics with parameters has been studied [Wang 1996; Emerson and Trefler 1999] Algorithms for computing lower and upper bounds on delays between specified events [Courcoubetis and Yannakakis 1991] or on durations of intervals specified using LTL [Campos et al. 1996], are known and correspond to special cases of our problem. Our framework, thus, presents the first decidable formulation of multiple, possibly correlated, parametric constraints. 2. PARAMETRIC TEMPORAL LOGIC We will first define parametric temporal logic using a full set of parameterized ....

Campos, S., Clarke, E., and Grumberg, O. 1996. Selective quantitative analysis and interval model checking. In Proc. of the 8th International Conference on Computer Aided Verification. LNCS 1102. Springer-Verlag, 257 -- 268.


Branching vs. Linear Time: Final Showdown - Vardi (2001)   (1 citation)  (Correct)

.... model checker can also be used to check for sequential equivalence of finite state machines [49] Furthermore, the automata theoretic approach can be easily adapted to perform quantitative timing analysis, which computes minimum and maximum delays over a selected subset of system executions [17]. Bounded Model Checking: In linear time model checking one searches for a counterexample trace, finite or infinite, which falsifies the desired temporal property. In bounded model checking, the search is restricted to a trace of a bounded length, in which the bound is selected before the ....

S. Campos, E.M. Clarke, and O. Grumberg. Selective quantitative analysis and interval model checking: Verifying different facets of a system. In Computer-Aided Verification, Proc. 8th Int'l Conf., volume 1102 of Lecture Notes in Computer Science, pages 257--268. Springer-Verlag, Berlin, 1996.


Parametric Temporal Logic for "Model Measuring" - Alur, Etessami, Torre, Peled (1999)   (5 citations)  (Correct)

....identified by various researchers. For system models with parametric bounds on delays, the reachability problem is known to be undecidable [AHV93,HKPV95] Algorithms for computing lower and upper bounds on delays between specified events [CY91] or on durations of intervals specified using LTL [CCG96] are known and correspond to special cases of our problem. The model checking problem for parameterized branching time logic has been solved [Wan96] but its solution applies only to a CTL like logic whose path formulas do not admit nesting of temporal modalities. 2 Parametric Temporal Logic We ....

S. Campos, E. Clarke, and O. Grumberg. Selective quantitative analysis and interval model checking. In Proce. Eighth CAV, LNCS 1102, 1996.


Analysis and Verification of Real-Time Systems using.. - Campos, Clarke (1999)   (3 citations)  Self-citation (Campos)   (Correct)

....design. For this reason real time system developers often significantly reduce asynchronism in their designs to ensure predictability. In fact, most real time systems we have analyzed present more synchronous features than traditional circuits, and have been successfully verified using Verus [5,6,7,8]. Related Work There are several other approaches to the verification of timed systems. For example, dense time is modeled by[1,2,15,19] Those methods provide a very accurate notion of passage of time. However, the state space of dense time models is infinite, and these verification tools rely ....

....using binary decision diagrams. This representation is very efficient, as attested by the real time systems verified. Several complex systems of industrial origin have been verified such as an aircraft controller [6] the PCI local bus[8] and a distributed heterogeneous real time system [5]. In all cases, the examples verified are derived from existing systems or use components and protocols employed in current industrial products. This paper describes in detail one of these systems, the controller for a robot used in nuclear reactors to measure the shapes of pipes by moving around ....

[Article contains additional citation context not shown here]

S. V. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: verifying different facets of a system. In: Computer Aided Verification, 1996.


Formal Verification and Analysis of Multimedia Systems - Campos, Ribeiro-Neto.. (1999)   (2 citations)  Self-citation (Campos)   (Correct)

....development costs. Verus has already been applied to the verification of several large complex systems (which are in production or are components of current industrial products) such as an aircraft controller [9] a robotics controller [8] and a distributed heterogeneous real time system [6]. In this work, we use Verus to verify the ALMADEM VoD video server a low cost VoD server implemented on a PC platform. 2 2.1 Modeling a Multimedia System A model of a multimedia system in Verus is a labeled state transition graph M . The labels correspond to the values of the variables in ....

S. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: Verifying different facets of a system. In Conference on Computer-Aided Verification. SpringerVerlag, 1996.


Test Sequence Generation and Model Checking Using Dynamic.. - Ergio Campos Orna   Self-citation (Campos Grumberg)   (Correct)

.... implemented dynamic transition relations and the test sequence generation algorithm within the symbolic model checking tool SMV [13] We have obtained a significant improvement in time and space on a variety of examples such as the PCI local bus [4] a distributed heterogeneous real time system [5] (for model checking) and test sequence generation for several Intel circuits. The new algorithm ran an average of 20 times faster than 4 the original (static) one (with a maximum speedup of 50 times) and using only 1.6 of the memory. Moreover, our algorithm has been able to determine test ....

S. Campos, E. M. Clarke, and O. Grumberg. Selective quantitative analysis and interval model checking: verifying different facets of a system. In Computer Aided Verification, 1996. To appear in Formal Methods in System Design.


Symbolic Model Checking in Practice - Campos (1999)   (1 citation)  Self-citation (Campos)   (Correct)

....to a symbolic implementation using BDDs. The tools are very efficient, as attested by the systems verified. We have applied this method to the verification of several real systems, such as an aircraft controller [6] a robotics controller[7] and a distributed heterogeneous real time system [4] and the PCI Local Bus[5] All examples verified are either actual systems or use components and protocols employed in current industrial products. The SMV Tool The system being verified is described in the SMV language. We can specify synchronous or asynchronous, detailed deterministic or ....

S. V. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: verifying different facets of a system. Computer Aided Verification, 1996.


The Verus Language: Representing Time Efficiently with BDDs - Campos (1997)   (2 citations)  Self-citation (Campos)   (Correct)

....amenable to a symbolic implementation using binary decision diagrams. This representation is very efficient, we have applied this method to the verification of several real systems, such as an aircraft controller [8] a robotics controller [10] and a distributed heterogeneous time critical system [7]. In all cases the examples verified are either actual systems or use components and protocols employed in current industrial products. The Verus Language The main goal of Verus is to allow engineers and designers to describe timed systems easily and efficiently. Special primitives are provided ....

....problem, and it takes advantage of the efficiency of BDD manipulation algorithms. This efficiency can be attested by the various systems verified such as the PCI local bus [9] a heterogeneous time critical system in which multimedia data travels over several different types of communication links [7] and others. For example, the full aircraft controller example described in section 5 has 15 concurrent processes and we have been able to produce counterexamples with depth greater than 2000 states in minutes using a PC workstation. The depth of a counterexample is relevant because it measures ....

S. V. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: verifying different facets of a system. In: Computer Aided Verification, 1996.


Formal Verification and Analysis of Multimedia Systems - Campos, Ribeiro-Neto.. (1999)   (2 citations)  Self-citation (Campos)   (Correct)

....development costs. Verus has already been applied to the verification of several large complex systems (which are in production or are components of current industrial products) such as an aircraft controller [9] a robotics controller [6] and a distributed heterogeneous real time system [10]. In this work, we use Verus to verify the ALMADEM VOD video server a low cost VoD server implemented on a PC platform. 3.1 The Verus Language The Verus specification language is presented in this section by a simple example. We discuss the modeling of a non deterministic event and an alarm ....

S. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: Verifying different facets of a system. In Conference on ComputerAided Verification. Springer-Verlag, 1996.


The Verus Tool: A Quantitative Approach to the Formal.. - Campos, Clarke, Minea (1997)   (8 citations)  Self-citation (Campos)   (Correct)

....indicative of the usefulness of the method than the size of the counterexamples are the types of systems verified. We have applied this method to the verification of several real systems, such as an aircraft controller [4] a robotics controller [5] and a distributed heterogeneous real time system [3]. In all cases, the examples verified are either actual existing systems or use components and protocols employed in current industrial products. 2 The Verus Language The main goal of the Verus language is to allow engineers and designers to describe real time systems easily and efficiently. It ....

....expressed using linear time temporal logic (LTL) 6] Special model checking techniques [6] are then used to ensure that only paths that satisfy the formula are considered by the algorithms. Selective quantitative analysis has been used to analyze the distributed heterogeneous system described in [3]. 4 Conclusions This work describes a new tool to be used in the formal verification of real time systems, Verus. In Verus a real time designer specifies the system to be verified in a C like language, and uses temporal logic model checking and quantitative timing analysis to verify its ....

S. V. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: verifying different facets of a system. In: Computer Aided Verification, 1996.


The Verus Language: Representing Time efficiently with BDDs - Rgio Campos (1997)   (2 citations)  Self-citation (Campos)   (Correct)

....of the usefulness of the method than the size of the counterexamples produced is the types of systems verified. We have applied this method to the verification of several real systems, such as an aircraft controller [4] a robotics controller[7] and a distributed heterogeneous real time system [3]. In all cases the examples verified are either real existing systems or use components and protocols employed in current industrial products. The Verus Language The main goal of Verus is to allow engineers and designers to describe real time systems easily and efficiently. It is an imperative ....

S. V. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: verifying different facets of a system. In: Computer Aided Verification, 1996.


A Road Map on Interval Temporal Logics and Duration Calculi - Goranko, Montanari.. (2003)   (Correct)

No context found.

S. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: Verifying di#erent facets of a system. In R. Alur and T.A. Henzinger, editors, Proc. of the 8th International Conference on Computer Aided Verification, number 1102 in LNCS, pages 257--268. Springer, 1996.


Symbolic Model Checking of Simply-Timed Systems - Markey, Schnoebelen (2003)   (Correct)

No context found.

S. Campos, E. M. Clarke, and O. Grumberg. Selective quantitative analysis and interval model checking: Verifying di#erent facets of a system. Formal Methods in System Design, 17(2):163--192, 2000.


Exact High Level WCET Analysis of Synchronous Programs by.. - Logothetis, Schneider (2003)   (Correct)

No context found.

S. Campos and O. Grumberg. Selective quantitative analysis and interval model checking: Verifying different facets of a system. In R. Alur and T. A. Henzinger, editors, Conference on Computer Aided Verification (CAV), volume 1102 of LNCS, pages 257--268, New Brunswick, NJ, USA, July/August 1996. Springer Verlag.


Advances in Finite Automata and Temporal Logic for System.. - Torre (1999)   (Correct)

No context found.

S. Campos, E. Clarke, and O. Grumberg. Selective quantitative analysis and interval model checking. In Proceedings of the 8th International Conference on Computer Aided Verification, LNCS 1102. Springer-Verlag, 1996.


On Integrating Scheduling Theory into Formal Models for Hard.. - Braberman   (Correct)

No context found.

S. Campos, O. Grumberg. Selective Quantitative Analysis and Interval Model Checking: Verifying Different Facets of a System. Proceedings of Computer Aided Verification 1996.


Automatic Verification of Real-Time Designs - Felder (1999)   (Correct)

No context found.

S. Campos, O. Grumberg. Selective Quantitative Analysis and Interval Model Checking: Verifying Different Facets of a System. Proceedings of Computer Aided Verification. LNCS 1102. 1996.

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