C.N. Ip, "State Reduction Methods for Automatic Formal Verification", PhD thesis, Stanford University, 1996.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....model checking on a large scale. There have primarily been two approaches to combat this problem. The first approach is to devise techniques to reduce the state space size to be explored while still ensuring that errors are detected. Examples of this approach are symmetry reduction techniques [IP96], partial order reduction techniques [HP94, NG02] etc. The second approach aims at reducing the amount of memory needed to perform the reachability analysis. Examples of this approach are bitstate hashing [Holz87] hash compaction [WL93, SD95] etc. The use of distributed processing to combat ....

C.N. Ip, "State Reduction Methods for Automatic Formal Verification", PhD thesis, Stanford University, 1996.

....at least as hard as testing graph isomorphism [3] Heuristics like the use of normalized states [2,13] have been proposed. Several normalized states can represent an orbit leading to a less complex suboptimal symmetry reduction. For a concise overview of symmetry reduction approaches we refer to [12]. The process of verifying a system can be divided in three phases [5] In a first exploratory phase one is interested in finding early errors quickly. The fault finding phase follows and consists of finding meaningful counterexamples. Eventually, the system becomes relatively stable. The ....

C. N. Ip. State Reduction Methods for Automatic Formal Verification. PhD thesis, Department of Computer Science of Standford University, 1996.

....explicit state enumeration. First, state reduction methods have been developed that aim at reducing the size of the reachability graph while ensuring that protocol errors will still be detected. Examples are exploiting symmetries, utilizing reversible rules and employing repetition constructors [8]. These methods directly tackle the main problem in reachability analysis: the very large number of reachable states of most protocols. The second approach aims at exploring a given reachability graph in the most efficient manner, minimizing memory usage and runtime. Examples are bitstate hashing ....

....only a small increase in runtime. Hence, the algorithm allows the verification of more complex protocols. The presented algorithm could also be used in other explicit state verification tools like SPIN [5] In addition, the algorithm is compatible with the two newer reduction techniques in Mur [8], reversible rules and repetition constructors, which were not yet available in the public release, and with the parallel version of Mur [14] For checking liveness properties, the currently used algorithms require a (modified) depth first search of the state space. Since the new scheme is based ....

C. N. Ip. State Reduction Methods for Automatic Formal Verification. PhD thesis, Stanford University, 1996.

....automated V V tools such as model checkers is in coming up with a tractable finite state model i.e. dealing with the state explosion problem. A lot of work has been done in combating the state explosion problem for hardware applications [4, 5, 6] Several techniques such as symmetry reduction [18], partial order red uction [9, 14] and symbolic encodings of states using representations such as BDDs, BMDs [17, 1, 2] have been considered. However, these techniques only work on finite models. They can not be applied in general to software systems, which typically use data types operating on ....

C. Norris Ip, " State Reduction Methods for Automatic Formal Verification," Ph.D. Thesis, Department of Computer Science, Stanford University, December 1996.

....explicit state enumeration. First, state reduction methods have been developed that aim at reducing the size of the reachability graph while ensuring that protocol errors will still be detected. Examples are exploiting symmetries, utilizing reversible rules, and employing repetition constructors [13]. These methods directly tackle the main problem in reachability analysis the very large number of reachable states of most protocols. The second approach aims at reducing the amount of memory needed to perform the reachability analysis. Examples are bitstate hashing [9] hash compaction [28, ....

....techniques, runtime becomes a major limiting factor [28, 22] For example, when verifying complex protocols with the Mur verifier [7] using symmetry reduction in combination with hash compaction, a single verification run that does not expose new errors typically takes several days. Norris Ip [13] even reported a runtime of 13.9 hours for only 38 269 states when using symmetry reduction in combination with reversible rules and repetition constructor reductions. We describe a parallel version of the Mur verifier for distributed memory multiprocessors and networks of workstations using the ....

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C. N. Ip. State Reduction Methods for Automatic Formal Verification. PhD thesis, Stanford University, 1996.

....two different approaches. First, state reduction methods have been developed that aim at reducing the size of the reachability graph while ensuring that system errors will still be detected. Examples are exploiting symmetries, utilizing reversible rules, and employing repetition constructors [8], as well as partial order techniques [11] These methods directly tackle the main problem in reachability analysis: the very large number of reachable states of most systems. The second approach aims at exploring a given reachability graph in the most efficient manner, minimizing memory usage and ....

....jobs on a local workstation instead of a dedicated verification machine with a huge main memory. The algorithm described could also be used in other explicit state verification tools like SPIN [6] In addition, the algorithm is compatible with all three state reduction techniques in Mur [8], with hash compaction, and with the parallel version of Mur [16] The algorithm is also compatible with Peled s partial order method [11] which had been assumed to require depth first search, but was recently shown to also work with breadth first search [3] on which the new scheme is based. ....

C. N. Ip. State Reduction Methods for Automatic Formal Verification. PhD thesis, Stanford University, 1996.

....state enumeration, runtime becomes a major limiting factor [90, 77] For example, when verifying complex protocols with the Mur verifier using symmetry reduction in combination with hash compaction, a single verification run that does not expose new errors typically takes several days. Norris Ip [44] even reported a runtime of 13.9 hours for only 38269 states when using symmetry reduction in combination with reversible rules and repetition constructor reduction. This chapter is devoted to an attempt to speed up verification by explicit state enumeration via parallel processing. A parallel ....

C. N. Ip. State Reduction Methods for Automatic Formal Verification. PhD thesis, Stanford University, 1996.

....state enumeration. First, state reduction methods have been developed that aim at reducing the size of the reachability graph while ensuring that protocol errors will still be detected. Examples would be exploiting symmetries, utilizing reversible rules and employing repetition constructors [13]. These methods directly tackle the main problem in reachability analysis: the very large number of reachable states of most protocols. The second approach aims at reducing the amount of memory needed to perform the reachability analysis. Examples would be bitstate hashing [9] and hash compaction ....

....and required bandwidth and to allow heterogeneity and dynamically changing load in the parallel machine are discussed, which we expect will allow good speedups when using conventional networks of workstations. The algorithm presented is compatible with the two newer reduction techniques in Mur [13], reversible rules and repetition constructors, which were not yet available in the public release. It is also compatible with the latest version of hash compaction [21] The most recent version of sequential Mur , on which the parallel version is based, does not support the checking of temporal ....

C. N. Ip. State Reduction Methods for Automatic Formal Verification. PhD thesis, Stanford University, 1996.

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