S. Shim and S.-M. Moon. Split-path Enhanced Pipeline Scheduling for Loops with Control Flows. In Proc. of the 29th Annual Symposium on Microarchitecture, pages 93--102, 1998. Home/Search Document Details and Download
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Global Software Pipelining with Iteration Preselection - Gregg (2000) (Correct)
....In practice, however, they cause enormous code growth and their controlling heuristics restrict their power [NN97] Several algorithms use code duplication to separate all paths in the loop and pipeline each separately. Again, the code growth from code duplication and cross paths can be huge [SM98]. A number of other strategies exist which trade code growth for restrictions on the attainable II [WPP95,SL96] A number of DESP [WE93] algorithms exist. These algorithms use a similar strategy as ours for TTS numbers for the strongly connected components in the dependence graph. But they differ ....
SangMin Shim and Soo-Mook Moon. Split-path enhanced pipeline scheduling for loops with control flows. In Micro 31, pages 290--302. ACM/IEEE, November 1998.
Code Gardé: Traduction, . . . - Hu (2000) (Correct)
....c) Final result Figure 6.2: GURPR To improve time and space efficiency, GURPR has been extended to GURPR [SW91] by the same research team. However, the extended algorithm overlaps loops using a single II for all iteration paths, as mentioned in Section 6.2.4. A more recent work appeared in [SM98] is very similar to GURPR, named Split path enhanced pipeline scheduling for loops with control flows. The only difference is that before modulo scheduling each path of a conditional branch, it pre processes the branch by splitting each individual path via tail duplication that has been proposed ....
S.M. Shim and S.M. Moon. Split-path enhanced pipeline scheduling for loops with control flows. In Proceedings of the 31th Annual International Symposium on Microarchitecture, pages 93--102, December 1998.
Time Optimal Software Pipelining of Loops with - Control Flo Ws (Correct)
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S. Shim and S.-M. Moon. Split-path Enhanced Pipeline Scheduling for Loops with Control Flows. In Proc. of the 29th Annual Symposium on Microarchitecture, pages 93--102, 1998.
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