| J. Engblom, A. Ermedahl, F. Stappert, Validating a Worst-Case Execution Time Analysis Method for an Embedded Processor, Dept. of Information Technology Tech. Report 2001-030, Uppsala University, 2001. |
....It is necessary to consider the correctness (and e#ectiveness) of each component in isolation, since otherwise errors in one component may mask errors in other components. Each component must be safe and tight in its own right in order for the complete analysis system to be safe and tight. In [15], we applied the idea of component wise isolation and testing to our tool in order to give evidence that the pipeline analysis and calculation method we are using are safe and tight. In [37] we investigated and improved the quality of our V850E simulator to more accurately reflect the real chip. ....
J. Engblom and A. Ermedahl. Validating a Worst-Case Execution Time Analysis Method for an Embedded Processor. In Work-in-Progress Session, 21 st IEEE Real-Time Systems Symposium (RTSS'00), November 2000.
.... control flow and hardware analysis results (including the effects of caches) to be integrated and used to efficiently calculate tight and safe WCET estimates [OS97, EE99, EE00a] ffl A method for validating the components of our WCET tool, aiming at a complete validation of the entire tool suite [EE00b] ffl We have investigated the properties of commercial embedded real time programs and the attitudes of real time practitioners regarding WCET tools and WCET analysis in general [Eng99, Gus00] Paper outline: In Section 2 we give a motivation for WCET analysis with focus on embedded real time ....
....can be converted to a format suitable for our IPET style of calculation. 8. Validating WCET Methods and Tools For a WCET tool or method implementation to be used in the development of a safety critical system we must be able to guarantee that it produces safe and reasonably tight results. In [EE00b] we address the problems faced during systematic testing of WCET analysis methods. When evaluating WCET analysis methods, the common methodology is to compare a WCET estimate with an execution of the same program with known worst case data on the target hardware. This evaluation method is ....
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J. Engblom and A. Ermedahl. Validating a WorstCase Execution Time Analysis Method for an Embedded Processor. In Proc. 21 st IEEE Real-Time Systems Symposium (RTSS'00), November 2000.
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J. Engblom, A. Ermedahl, F. Stappert, Validating a Worst-Case Execution Time Analysis Method for an Embedded Processor, Dept. of Information Technology Tech. Report 2001-030, Uppsala University, 2001.
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