D.Liu, C.Svensson. Configuration-Based Architecture for High Speed and General-Purpose Protocol Processing, SiPS, pp 540-547, 1999. Home/Search Document Not in Database Summary Related Articles Check |
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ASIP Design Methodology for telecommunications - Montfort, Diguet, Philippe (Correct)
....that theoretically speed up to 10 can be obtained by migrating IP and TCP protocols to hardware (software: 6 Mbits s, hardware: 60 Mbits s) B. Hardware solutions We found two hardware protocol oriented solutions that include protocols above level 2. An interesting model proposition is given in [2] for a DPSPs (Deep Pipeline Serial Processor) The author idea is to improve the data management by implementing a specific function localised in a configurable coprocessor, in order to reach ASIC performances. Using a large shifter register, the co processor handles flag and acknowledge control ....
D.Liu, C.Svensson. Configuration-Based Architecture for High Speed and General-Purpose Protocol Processing, SiPS, pp 540-547, 1999.
The TACO Protocol Processor Simulation Environment - Virtanen, Lilius (2001) (Correct)
....optimized for internet protocols is proposed. The emphasis in the optimization is on the handling of the state table. The processor contains a special unit to handle jumps e#ciently. In contrast the TACO processor is more like a pipelined processor. The programmer has to schedule the jumps. In [6] another programmable protocol processor architecture is proposed. Here the idea is that each layer of the protocol is processed in a separate stage. The data flow is thus organized according to layers. In our approach something similar could be achieved by having one bus for each layer in the ....
D. Liu, U. Nordqvist, and C. Svensson. Configuration based architecture for high speed and general purpose protocol processing. In Proceedings of the IEEE Workshop on Signal Processing Systems (SiPS'99), Taiper, Taiwan, October 1999.
Grammar based protocol synthesis for Protocol Processors - Application For Graduate (Correct)
....Assuming that the project starts in Spring 2000, the following broad milestones are planned. Spring 2001. Definition of notation for protocol specification and architecture. Selection of representative preliminary protocol processor architectures based on results from the companion projects [6, 7] and application protocol. Initial experimental results. Formulation of the retargettable compilation problem. Spring 2002. First version of compiler targetting one example architecture. Results from a realistic industrial application. Spring 2003. First version of the retargettable compiler, ....
Dake Liu, et. al. Configuration Based Architecture for High Speed and General Purpose Protocol Processor Architecture.
Probabilistic Verification Methodology for DSP ASICs - Application For Graduate (Correct)
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Dake Liu, et. al. Configuration Based Architecture for High Speed and General Purpose Protocol Processor Architecture.
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