F. Petrini and M. Vanneschi, k-ary n-trees: High performance networks for massively parallel architectures, in: Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, Geneva, Switzerland, April 1997, pp. 87--93.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....combined with an aging mechanism to ensure a fair delivery of packets in the same priority level, 6) hardware support for broadcasts, and (7) adaptive routing. The Elite switches are interconnected in a quaternary fattree topology, which belongs to the more general class of the k ary n trees [16,17]. A quaternary fat tree of dimension n is composed of 4 n processing nodes and n n 1 switches interconnected as a delta network, and can be recursively built by connecting 4 quaternary fat trees of dimension n 1. Quaternary fat trees of dimension 1, 2 and 3 are shown in figure 2. 2.2.1. ....

F. Petrini and M. Vanneschi, k-ary n-trees: High performance networks for massively parallel architectures, in: Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, Geneva, Switzerland, April 1997, pp. 87--93.

....with a particular internal structure. The base class that describes a processing element is the class node. These objects are then assembled together according to a given topology to form a parallel architecture. At the moment SMART supports the following families of topologies: k ary n trees [21], k ary n butterflies, k ary n cubes and the full crossbars [19] Figure 1: A 4 ary 2 tree. A packet can follow any minimal path passing through a nearest common ancestor of source and destination. k ary n trees [21] are a particular subclass of the fat trees and borrow from the k ary ....

....the moment SMART supports the following families of topologies: k ary n trees [21] k ary n butterflies, k ary n cubes and the full crossbars [19] Figure 1: A 4 ary 2 tree. A packet can follow any minimal path passing through a nearest common ancestor of source and destination. k ary n trees [21] are a particular subclass of the fat trees and borrow from the k ary n butterflies [19] the topology of the internal switches. A k ary n tree has k n leaf nodes and n levels of k n Gamma1 switches. Each switch has 2k links. A 4 ary 2 tree is shown in Figure 1 From the simulation point of ....

[Article contains additional citation context not shown here]

F. Petrini and M. Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. In Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, pages 87--93, Geneva, Switzerland, April 1997.

....combined with an aging mechanism to ensure a fair delivery of packets in the same priority level, 6) hardware support for broadcasts, 7) and adaptive routing. The Elite switches are interconnected in a quaternary fattree topology, which belongs to the more general class of the k ary n trees [9] [8]. A quaternary fat tree of dimension n is composed of 4 n processing nodes and n 4 n 1 switches interconnected as a delta network, and can be recursively build by connecting 4 quaternary fat trees of dimension n 1. Quaternary fat trees of dimension 1, 2 and 3 are shown in Figure 2. Elite ....

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. In Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, pages 87--93, Geneva, Switzerland, April 1997.

....prototypes and commercial machines. The data network of the Connection Machine CM 5 uses two distinct fat trees [9] The interconnection networks of both Meiko CS 2 and Data Diffusion Machine(DDM) take the form of a quaternary fat tree [10] 11] and belong to the general class of k ary n trees [12]. The design is based on a butterfly multistage network with processing nodes attached on a 3 single side of the network and has the property that the overall communication bandwidth remains constant at each level. An example of asymmetric fat tree is the Berkeley NOW [13] While the direct ....

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. In Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, pages 87--93, Geneva, Switzerland, April 1997.

.... for long periods of their execution time [21] It is worth noting that this is a peculiar problem of direct interconnection networks, because in multistage networks or fat trees new packets can only be injected from the external levels and do not interfere with the intermediate routing switches [20]. In this paper we face the problems originated by the asymmetries introduced by the virtual channels by properly tuning the flow control algorithms that regulate the injection of new packets into the network. 3 The routing algorithm An elegant approach to avoid deadlock in wormhole routed ....

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. Technical Report TR95 -18, Dipartimento di Informatica, Universit`a di Pisa, December 1995.

....priority levels combined with an aging mechanism to ensure fair delivery of packets in the same priority level, 6) hardware support for broadcasts, and (7) adaptive routing. The switches are interconnected in a quaternary fat tree topology, which belongs to the more general class of k ary n trees [7, 6]. Elite networks are source routed, and the transmission of each packet is pipelined into the network using wormhole flow control. At the link level, each packet is partitioned in smaller units called flits (flow control digits) 3] of 16 bits. Every packet is closed by an End Of Packet (EOP) ....

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. In Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, pages 87--93, Geneva, Switzerland, April 1997.

....this result does not generalize to the toroidal cube. CHAPTER 1. INTRODUCTION 11 Part of the results of this thesis together with some related work, not shown here for brevity, either appeared in the literature or are still under review [118] 120] 121] 123] 122] 124] 117] 130] 129] [127] [128] 119] 125] 126] 47] 1.6 Thesis Overview The thesis is organized as follows. Chapter 2 deals with the topological properties of interconnection networks. It discusses many aspects and measures commonly used to evaluate and compare topologies and provides an overview of many widely used ....

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. In Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, Geneva, Switzerland, April 1997.

....25 . Unfortunately, this result does not generalize to the toroidal cube. CHAPTER 1. INTRODUCTION 11 Part of the results of this thesis together with some related work, not shown here for brevity, either appeared in the literature or are still under review [118] 120] 121] 123] 122] 124] [117] [130] 129] 127] 128] 119] 125] 126] 47] 1.6 Thesis Overview The thesis is organized as follows. Chapter 2 deals with the topological properties of interconnection networks. It discusses many aspects and measures commonly used to evaluate and compare topologies and provides an overview ....

....networks, for example the internal switches and the leaf nodes of a fat tree or the nodes of a cube. These objects are then assembled together according to a given topology to form a parallel architecture. At the moment SMART supports the following families of topologies: k ary n trees [117], k ary n butterflies, k ary n cubes and the full crossbars [98] The latter are mainly used to compare the performance of a physically feasible network with an ideal one. From the simulation point of view, the processing node can be seen as a collection of communicating entities and can be ....

[Article contains additional citation context not shown here]

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. Technical Report TR-95-18, Dipartimento di Informatica, Universit`a di Pisa, December 1995.

....with an aging mechanism to ensure a fair delivery of packets in the same priority level, 6) hardware support for broadcasts, 7) and adaptive routing. The Elite switches are interconnected in a quaternary fat tree topology, which belongs to the more general class of the k ary n trees [9] [8]. A quaternary fat tree of dimension n is composed of 4 n processing nodes and n 4 n 1 switches interconnected as a delta network, and can be recursively build by connecting 4 quaternary fat trees of dimension n 1. 4 The crossbar has two input ports for each input link, to accommodate the ....

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. In Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, pages 87-93, Geneva, Switzerland, April 1997. 10

.... over the last decade [24, 13, 8, 6, 7, 38, 37, 23, 35] In this paper we analyze through simulation the characteristics of the communication patterns generated by some parallel FFT algorithms on two popular families of interconnection networks, the k ary n cubes [17] and the k ary n trees [34] [32], using wormhole and cut through routing algorithms. The goal is to verify the gap between theoretical models of the interconnection networks and actual performance results. Wormhole is a ow control protocol that divides each packet in elementary units called its and advances each it as soon ....

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. In Proceedings of the 11th International Parallel Processing Symposium, IPPS'97, pages 87-93, Geneva, Switzerland, April 1997.

.... Chu87, Bai90, Bai87, Bai88, Swa87, Swa84, Get92, RWW91] In this paper we analyze through simulation the characteristics of the communication patterns generated by some parallel FFT algorithms on two popular families of interconnection networks, the k ary n cubes [Dal90] and the k ary n trees [PV95a] using wormhole and cut through routing algorithms. The goal is to verify the gap between theoretical models of the interconnection networks and actual performance results. Wormhole is a flow control protocol that divides each packet in elementary units called flits and advances each flit as ....

....be accomplished sending the packet to one of the nearest common ancestors (NCA) and from there to the destination. That is, each packet experiences two phases, an adaptive ascending phase to get to an NCA, followed by a deterministic descending phase. This algorithm uses a single virtual channel [PV95a] Understanding the real performance of an interconnection network and its routing algorithm is a key factor to design scalable and portable parallel algorithms. Many algorithms are designed having in mind factors not present in any reasonable machine, such as zero communication delay or ....

[Article contains additional citation context not shown here]

Fabrizio Petrini and Marco Vanneschi. k-ary n-trees: High Performance Networks for Massively Parallel Architectures. Technical Report TR-18/95, Dipartimento di Informatica, Universit`a degli studi di Pisa, December 1995.

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC