C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proc. SPAA, pages 273--282, 1993.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....O(C L) bound, which might motivate searching for more practical algorithms that come to the same or even better performance guarantee. 1. 3 Related Work Hot potato routing algorithms have been studied for specific network multiprocessor architectures such as the 2 dimensional mesh and torus [5, 9, 10, 12, 14], the d dimensional mesh [5, 7] the hypercube [8, 12] and trees [2] Meyer auf der Heide and Scheideler [20] study the more general class of vertex symmetric networks. For more about multiprocessor architectures you can look at [15] Bhatt et al. 6] study hot potato routing on leveled networks, ....

C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

....at random. Since the distance to a randomly chosen destination is n) this complexity is also asymptotically optimal. Our algorithm exploits techniques for randomized hot potato routing ( home runs ) rst described by Busch et al. 10] That algorithm, like most prior hot potato algorithms [12, 5, 17, 2, 7, 10, 9], is static: all packets are injected at time zero, and the analysis examines the time needed to deliver them. Static algorithms, by de nition, need not be concerned with ow control. Our new algorithm, like only a few others [8, 11] is dynamic: nodes may inject packets into the network ....

....packet on each outgoing link. The links are bidirectional. The distance between two nodes corresponds to the minimum time needed to send a packet from one node to the other. 1. 3 Packet Generation and Delivery As noted, most earlier hot potato algorithms consider only one shot (static) problems [12, 5, 17, 2, 7, 10, 9]. By contrast, our algorithm and analysis is dynamic, nodes may inject packets repeatedly over a long duration. We are aware of only two other dynamic hot potato algorithms [8, 11] All the packets have random destination, distributed uniformly over the n nodes in the network. As the ....

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273-282, Velen, Germany, June 30{July 2, 1993. SIGACT and SIGARCH.

....at random. Since the distance to a randomly chosen destination is #) this complexity is also asymptotically optimal. Our algorithm exploits techniques for randomized hot potato routing ( home runs ) rst described by Buschetal. 10] That algorithm, like most prior hot potato algorithms [12, 5, 17, 2, 7, 10, 9], is ######: all packets are injected at time zero, and the analysis examines the time needed to deliver them. Static algorithms, by de nition, need not be concerned with ow control. Our new algorithm, like only a few others [8, 11] is dynamic: nodes may inject packets into the network ....

....packet on each outgoing link. The links are bidirectional. The distance between two nodes corresponds to the minimum time needed to send a packet from one node to the other. 1. 3 Packet Generation and Delivery As noted, most earlier hot potato algorithms consider only one shot (static) problems [12, 5, 17, 2, 7, 10, 9]. By contrast, our algorithm and analysis is #######, nodes may inject packets repeatedly over a long duration. We are aware of only two other dynamic hot potato algorithms [8, 11] All the packets have random destination, distributed uniformly over the # # nodes in the network. As the ....

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In ########### ## ### ### ###### ### ######### ## ######## ########## ### #############, pages 273-282, Velen, Germany, June 30{July 2, 1993. SIGACT and SIGARCH.

.... and in optical networks (see [15, 16] for references) When designed properly, hot potato routing algorithms are extremely efficient for random inputs [21] A better theoretical analysis can be found in the paper of Feige and Raghavan [3] Further progress is made in several recent papers [15, 5, 6]. In some of these algorithms sorting is applied as a subroutine. In hot potato sorting packets starting in the white PUs, the P i;j with i j even, never get to see the packets in the black PUs, the P i;j with i j odd. This means that (unless modifying the strict assumptions of the model) at ....

Kaklamanis, C., D. Krizanc, S. Rao, `Hot-Potato Routing on Processor Arrays,' Proc. 5th Symposium on Parallel Algorithms and Architectures, pp. 273--282, ACM, 1993.

....may be too specifically tailored to static permutations and synchronous networks to be practical. The desire to have simple routing algorithms with constant sized queues per node has led to the growing body of literature on hot potato (or deflection) routing [BNRST93, BC91, FR92, Haj91, KKR93, NS92] where at each step every node in the network must send all packets it received during the previous step. In these algorithms, no extra queues are needed, and packets again typically take nonminimal paths. Newman and Schuster [NS92] give an algorithm that routes any permutation in 7n ....

....This difference is small because the algorithm is using more randomness than in Experiments 1 and 2, so the initial random state has less impact on delivery time than in the previous experiments. 64 4. 3 A Greedy Hot Potato Algorithm Hot potato or deflection routing [BNRST93, BDHS93, FR92, Haj91, KKR93] where a node must send on the next step any packets it receives in the current step, offers the possibility of simple logic and simple algorithms. Greedy hot potato routing [BDHS93] where packets use profitable outlinks whenever they are available, might be a nonminimal adaptive solution to ....

C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 1993 ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, June 1993.

....like the sorting based algorithms, their algorithms may be too specifically tailored to static permutations and synchronous networks to be practical. The desire to have simple routing algorithms with constant sized queues per node has led to the growing body of literature on hot potato routing [1, 5, 8, 9, 12, 22], where at each step every node in the network must send all packets it received during the previous step. In these algorithms, packets again typically take nonminimal paths. Newman and Schuster [22] 3 give an algorithm that routes any permutation in 7n o(n) steps, but the algorithm uses ....

C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 1993 ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, June 1993.

....because in such situations there is no reason to deroute. Given that assumption, then only when congestion is heavy can a nonminimal algorithm behave differently from a minimal algorithm. But by then, it perhaps is too late to try to relieve the congestion. Hot potato or deflection routing [1, 2, 9, 10, 12], where a node must send on the next step any packets it receives in the current step, offers the possibility of simple logic and simple algorithms. Because nodes in hot potato routing do not use extra buffer space, congestion does not have a chance to build as it does in networks where nodes do ....

C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 1993 ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, June 1993.

....and Hopcroft [7] Prager [17] and Hajek [12] presented algorithms for hypercubes. Hot potato routing algorithms for 2 dimensional meshes and tori were proposed by Bar Noy et al. 3] Ben Aroya et al. 4] Newman and Schuster [16] Kaufman et al. 14] Feige and Raghavan [11] Kaklamanis et al. [13], Borodin et al. 6] and Feige [10] Some of the above results (e.g. 13] extend to meshes and tori of higher dimensions. All of them deal with batch routing problems. The only study of the dynamic case we are aware of is that of Broder and Upfal [8] In spite of the important theoretical work ....

.... Hot potato routing algorithms for 2 dimensional meshes and tori were proposed by Bar Noy et al. 3] Ben Aroya et al. 4] Newman and Schuster [16] Kaufman et al. 14] Feige and Raghavan [11] Kaklamanis et al. 13] Borodin et al. 6] and Feige [10] Some of the above results (e.g. [13]) extend to meshes and tori of higher dimensions. All of them deal with batch routing problems. The only study of the dynamic case we are aware of is that of Broder and Upfal [8] In spite of the important theoretical work done so far, there are some implementation issues that have to be ....

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot--Potato Routing on Processor Arrays. In Proc. of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pp. 273--282, 1993.

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proc. SPAA, pages 273--282, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

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C. Kaklamanis, D. Krizanc, and S. Rao, Hot-potato routing on processor arrays, In Symp. of Parallel Algorithms and Architectures , 1993

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273-282, Velen, Germany, June 30{July 2, 1993. SIGACT and SIGARCH.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30-- July 2, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30-- July 2, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30-- July 2, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30-- July 2, 1993.

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Ch. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273--282, Velen, Germany, June 30--July 2, 1993.

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 1993 ACM SymposiumonParallel Algorithms and Architectures, pages 273#282, June 1993.

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Proceedings of the 5th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 273-282, Velen, Germany, June 30{July 2, 1993. SIGACT and SIGARCH.

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C. Kaklamanis, D. Krizanc, and S. Rao. Hot-potato routing on processor arrays. In Symposium on Parallel Algorithms and Architecture, pages 273#282, 1993.

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