D. Citron and D. Feitelson, "The Organization of Lookup Tables for Instruction Memoization", Hebrew University of Jerusalem Technical Report: 2000-4. Home/Search Document Details and Download
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Increasing Instruction-Level Parallelism with Instruction.. - Yi, Sendag, Lilja (2002) (Correct)
....needed to be stored only once. Any unique computation that has a frequency of execution greater than one is a redundant computation. As a result, this profiling method shows not only that a unique computation is redundant, but it also shows the amount of redundancy. Since previous works [3,4,5,8,9,10,12,13,14,15] only show that most unique computations are redundant, this unique computation frequency profiling is our first contribution. TABLE 1. Selected Characteristics for the Benchmarks Previously Tested Benchmark Suite Type Input Set A Input Set B 099.go SPEC 95 Integer Train Reduced Test ....
....When the table area is decreased to a more realistic 36KB, the reported speedups dropped to 2 to 15 with an average of 7 . While the speedups between our 2048 entry table and their 200KB version are comparable, our approach uses almost an order of magnitude less area. Citron and Feitelson [3, 4, 5] proposed using distributed value reuse tables that are accessed in parallel with the functional units. While this approach produced speedups up to 20 , it targets only long latency instructions such as multiply, divide, and square root. In addition to targeting different instructions, using a ....
D. Citron and D. Feitelson; "The Organization of Lookup Tables for Instruction Memoization"; Hebrew University of Jerusalem Technical Report: 2000-4
Hardware Memoization of Mathematical and Trigonometric Functions - Citron, Feitelson (2000) (1 citation) Self-citation (Citron Feitelson) (Correct)
....an entry that has returned 6 a miss and having an input value compared to more than one entry (using associative sets) are used in the design of memo tables. Specifically we suggest memo tables of 64 entries and 4 way associativity. The justification for these values is presented in another paper[22]. Unlike a conventional cache where each line contains more than one word and a relatively small associated tag, the memo table contains a large tag and just the one word result in each line. To emphasize this distinction, we shall use entry instead of the traditional line or block. Given that ....
....if the number of sets in the memo table is k then the bits used to index the memo table are the two Least Significant Bits (LSB) of the exponent and the log(k) Gamma 2 Most Significant Bits (MSB) of the mantissa. This is based on the extensive study of instruction memo tables (performed in [22]) which shows that this mapping scheme yields the best utilization of memo table entries. Figure 2 shows the bit positions. In the case where both the function identifier and input value are used as an index the relevant bits from both are XORed together to create an index. exponent mantissa ....
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D. Citron and D. Feitelson, "The Organization of Lookup Tables in Instruction Memoization", Technical Report, 2000-4, Hebrew University of Jerusalem, March 2000.
Improving Processor Performance and Simulation Methodology - Yi (Correct)
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D. Citron and D. Feitelson, "The Organization of Lookup Tables for Instruction Memoization", Hebrew University of Jerusalem Technical Report: 2000-4.
Improving Processor Performance and Simulation Methodology - Yi (2003) (Correct)
No context found.
D. Citron and D. Feitelson, "The Organization of Lookup Tables for Instruction Memoization", Hebrew University of Jerusalem Technical Report: 2000-4.
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