Anderson, T. E., Levy, H. M., Bershad, B. N. and Lazowska, E. D. "The Interaction of Architecture and Operating System Design". Proc. 4th Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Santa Clara, CA, April 1991, pp.108-120.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....are sandboxed within run time checks which ensure that no illegal accesses are possible. As with language based protection, data is shared between client code and service code. 3. Related Work Quite a few researchers have analyzed the performance of classic kernel based protection mechanisms [Anders 91] Ouster 90] reports that although cpu performance has improved significantly over the last few years, operating system performance, especially context switch times have clearly not kept pace. His work did not analyze the reasons for this behavior. The impact of context switches on the cache ....

Anderson, T., Levy H., Bershad B., Lazowska E., The interaction of architecture and operating system design, Architectural Support for Programming Languages and Operating Systems, Santa Clara, CA,

....system (OS) and how well is the application exploiting an OS s capabilities. Such issues are extremely important in order to fine tune system performance since we find that the three subsystems application (workload) OS and hardware are constantly evolving, and many times quite independently [1]. The nature and diversity of workloads have seen substantial changes that we need to go back to understanding the interplay of the three subsystems based on these new workloads. In particular, we note the growing importance of the OS in emerging application environments, with OS services being ....

T. E. Anderson, H. M. Levy, B. N. Bershad, E. D. Lazowska, The Interaction of Architecture and Operating System Design, In Proceedings of the fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108-120, 1991.

....higher clock frequencies, and the growing demands for larger working sets by applications continue to make TLB design and implementation critical in current and future microprocessors. Several studies have quantified the importance of TLB performance on system execution [16] Anderson et al. [1] show that TLB miss handling has an important consequence on performance, and this is the most frequently executed kernel service. TLB miss handling has been shown to constitute as much as 40 of execution time [14] and upto 90 of a kernel s computation [27] Studies with specific applications ....

....The experimental set up is detailed in Section 3, and the results from the characterization are presented in Section 4. Section 5 summarizes the lessons learnt from this study and outlines suggestions for future TLB design and optimization. 2. RELATED WORK As was mentioned earlier, many studies [7, 15, 1, 14, 27] have pointed out the importance of the TLB and the necessity of speeding up the miss handling process. Several studies [31, 15, 23] have looked at hardware TLB structures organization and their impact on system performance in terms of capacity and or associativity. While some of these have ....

T. E. Anderson, H. M. Levy, B. N. Bershad, and E. D. Lazowska. The Interaction of Architecture and Operating System Design. In Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108--120, Santa Clara, California, April 1991.

....we are advocating a wholesale change in temporal perspective that will bring a more complete suite of CS tools that leverage statistical behavior (virtual memory, multi threading, etc. to bear on signal processing problems. 5Albeit at a rate that lags improvement in the technology as a whole [12]. 12 5.5 Towards a Computer Science Perspective on Information theory Information theory focuses on the relationship of channel bandwidth, signal level, noise and capacity. It also provides a bridge between various modulation and coding domains including frequency division, time division and ....

Anderson, T., Levy, H., Bershad, B., Lazowska, E. The Interaction of Architecture and Operating System Design, 4th Int. Conf. on Arch. Support for Programming Languages and Operating Systems. Pages 108-120, Santa Clara CA, April 1991.

....in microprocessor performance due to recent advances in VLSI and RISC technology have not produced a corresponding improvement in application performance on shared memory ma chines. Just as increased integer performance does not produce a corresponding improvement in operating system performance [Anderson et al. 1991b; Ousterhour, 1990] an increase in computational power in shared memory multiprocessors does not guarantee a correspond ing improvement in application performance because communication quickly becomes the bottleneck. As computational power continues to increase, application performance depends ....

T.E. Anderson, H.M. Levy, B.N. Bershad, and E.D. Lazowska, "The Interaction of Architecture and Operating System Design," In Proceedings of the dth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108-120, April 1991.

....and capacity. It also provides a bridge between various modulation and coding domains including frequency division, time division and code division. Many applications of information theory deal with trade offs between the time 4Albeit at a rate that lags improvement in the technology as a whole [9]. and frequency domain. Other applications, especially in the realm of coding deal with the mapping of bits onto symbol alphabets that are suited to the available channel(s) Ultimately, we are searching for a computer science perspective on information theory that provides additional insight as ....

Anderson, T., Levy, H., Bershad, B., Lazowska, E. The Interaction of Architecture and Operating System Design, 4th Int. Conf. on Arch. Support for Programming Languages and Operating Systems, Pages 108-120, Santa Clara CA, April 1991.

....of protection boundaries and that is likely to produce a very high overhead. It is particularly unfortunate that modern RISC processors seem to have made the cost of crossing the user kernel boundary substantially higher (relative, say, to integer performance) than in earlier CISC processors [1]. Thus, sophisticated approaches are required to provide such run time confinement at acceptable cost. One possibility is to reduce the overhead caused by crossing domain boundaries. The obvious way to achieve this is to reduce the cost of crossing the boundary [4] An alternative is to avoid ....

T. Anderson, H. Levy, B. Bershad, and E. Lazowska. The interaction of architecture and operating system design. In Proceedings, Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108--120, Santa Clara, California, April 8--11 1991.

....that ran within the operating system we used. However, it is clear that such implementations require MMU TLB manipulations on each I O operation. In contrast, our scheme does not touch the MMU system in the common case. As CPUs become faster, the relative cost of MMU manipulations will increase [3], which will make implementations that touch the MMU on every operation even less attractive. Future extensions of this work include using fbufs for device to device data copying. The semantics of fbufs API allows implementations to delay filling a buffer on input operations. If such an fbuf is ....

Anderson Thomas, Henry Levy, Brian Bershad, and Edward Lazowska, "The Interaction of Architecture and Operating System Design," Proceedings of the 4th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS IV) (1991), 108120.

....a service of the operating system kernel. Since all communication operations are protected operations, the kernel can ensure that user level processes play by the rules. One problem with putting communication in the kernel is that crossing protection boundaries is costly [Anderson et al. 92, Anderson et al. 91] There are several reasons for this: ffl context switch costs: Crossing into the kernel requires that registers be saved and restored. It also generally causes some cache and translation buffer misses, due to a change in locality. ffl lack of trust: The kernel must be especially careful not to ....

T. E. Anderson, H. M. Levy, B. N. Bershad, and E. D. Lazowska. The interaction of architecture and operating system design. In Proceedings of 4th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108--120, 1991.

....Cache Issues in Real Time Systems 5 Iowa State University, May 94 5.3. Cache costs: Dynamic Scheduling Consider a real time system scheduled using Rate Monotonic Analysis (RMA) 11] Let d represent the time required by the kernel to perform a context switch. Published research[13,14] estimates d to be in the range of 7 to 70 s for typical time sharing workloads) Each task s execution time is modified to take into account its cache performance, as follows: C = C 2d g, Here, C is the modified estimate of the Worst Case Execution Time. C is the estimated worst case ....

Anderson et al: #The Interaction of Architecture and Operating System Design#. Proc. 4th Int. Conf. on Architectural Support for Prog. Languages and Oper. Systems, Palo Alto, CA 1991.

....as data movement becomes more difficult relative to computation BibRef[50] However, as noted in the introduction, network software latency is by no means keeping pace with CPU speed. This is because system software, of which network software is a subset, exhibits poor memory locality BibRef[2]BibRef[17] and includes varieties of processing not considered to be common cases by RISC CPU designers such as interrupts and context switches. Another reason why network software latency improvement has erroneously been considered to be unimportant is it was believed that communication ....

T. Anderson, H. M. Levy, B. N. Bershad, E. D. Lazowska, "The Interaction of Architecture and Operating System Design," Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pp. 108-120, April 1991.

....However, making the structure larger causes penalty in area, power and access time. This access time might become the CPU cycle time limit. Also large structures, which increase the amount of processor state, might have poor performance with workloads that require high context switch rates [ALBL91] Registers Renaming Cache Of Register Sets Stack Cache Cache Explicitly Managed Implicitly Managed Figure B.1: Spectrum of Possible First Level Data Memory Explicit mechanisms rely on sophisticated compiler technology to achieve performance. Analysis of variable access across procedure calls is ....

T. Anderson, H. Levy, B. Bershad, and E. Lazowska. The Interaction of Architecture and Operating System Design. In Conference Proceedings, Architectural Support for Programming Languages and Operating Systems (ASPLOS IV), pages 108--120, April 1991.

....proven to be a problem in many micro kernels due to the increased modularity. Since much of the functionality of systems such as Mach resides outwith the kernel, there is an increase in inter process communication and interactions with the kernel compared to a monolithic design. As Anderson notes [3], crossing from one protection domain to another is a relatively expensive operation that is not getting faster as the speed of machines increase. Therefore, IPC and system call performance can be a serious bottleneck in many micro kernels. By way of opposition, Liedtke claims that the ....

T.E. Anderson, H.M. Levy, B.N. Bershad, and E.D. Lazowska. "The Interaction of Architecture and Operating System Design", in Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, Santa Clara, California, pp. 108-120, 1991.

....however, all module interaction involves inter process communication, and thus imposes communication overhead proportional to the number of modules that constitute a service. Communication between different protection domains is inherently more costly than communication within a protection domain [2]. Consequently, there is a tradeoff between protection, failure isolation and fine grained access control on one hand and performance on the other hand. The right tradeoff depends on the requirements of the program s users with respect to protection and failure isolation, the stability of the ....

T. Anderson, H. Levy, B. Bershad, and E. Lazowska. The interaction of architecture and operating system design. In Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, Apr. 1991.

....to performance. To avoid the complexities of instruction level simulation of interrupt handlers, we assume a constant overhead for page faults. Table 1 summarizes the default parameters used both in our hardware and software coherence simulations, which are in agreement with those published in [3] and in several hardware manuals. Some of the transactions required by our coherence protocols require a collection of the operations shown in table 1 and therefore incur the aggregate cost of their constituents. For example a read pagefault on an unmapped page consists of the following: a) a TLB ....

T. E. Anderson, H. M. Levy, B. N. Bershad, and E. D. Lazowska. The Interaction of Architecture and Operating System Design. In Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108--120, Santa Clara, CA, April 1991.

....understand the performance of higher level kernel primitives; thus they are not useful for the performance decomposition approach. Anderson et al. pursued a similar approach in order to examine the interplay of hardware architecture and the operating system in a multiprocessing microkernel design [1]: they used a set of ad hoc microbenchmarks to perform a cross platform comparison of OS primitives targeted to microkernel bottlenecks (IPC and communications latency, thread overhead, etc. Again, the benchmarks they used were not complete enough to provide the detail necessary for constructing ....

....to the implicit add) while using pointers can cause false data dependency interlocks. The difference between the two approaches is evident upon examination of the compiler s output for the two benchmarks: gcc (on the x86) implements the array offset addressing in the C statements (ebx[0] 1; ebx[1]=1; as: movl 1, ebx) movl 1, 4( ebx) while a similar example using pointers ( ebx = 1; ebx = 1; is implemented as: movl 1, ebx) addl 4, ebx movl 1, ebx) addl 4, ebx. Depending on how the processor s pipeline handles interlocks, the two methods can produce different ....

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Anderson, T., Levy, H., Bershad, B., and Lazowska, E. "The Interaction of Architecture and Operating System Design." Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, April 1991: 108--120.

....Tandem Computers, Inc. 1 concentrated in relatively narrow ranges of addresses. Similarly, Chen and Bershad [8] reported that system code has lower locality than application code. They also pointed out the self interference in the cache. Other researchers like Ousterhout [20] and Anderson et al. [4] also indicated the different nature of the operating system activity. Finally, Nagle et al. [19] pointed out that instruction cache performance is becoming increasingly important in new generation operating systems. Clearly, given the practical importance of achieving high hit rates in instruction ....

T. Anderson, H. Levy, B. Bershad, and E. Lazowska. The Interaction of Architecture and Operating System Design. In Proceedings of the 4th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108--120, April 1991.

No context found.

Anderson, T. E., Levy, H. M., Bershad, B. N. and Lazowska, E. D. "The Interaction of Architecture and Operating System Design". Proc. 4th Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Santa Clara, CA, April 1991, pp.108-120.

No context found.

T.E. Anderson, H.M. Levy, B.N. Bershad, and E.D. Lazowska. The interaction of architecture and operating system design. In Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 1991.

No context found.

T. E. Anderson, H. M. Levy, B. N. Bershad and E. D. Lazowska, `The interaction of architecture and operating system design', ACM SIGOPS, 1991, pp. 108--120.

No context found.

T. E. Anderson, H. M. Levy, B. N. Bershad and E. D. Lazowska, `The interaction of architecture and operating system design', Proceedings of the 4th Symposium on Architectural Support for Programming Languages and Operating Systems, April 1991, pp. 108--120.

No context found.

T. E. Anderson, H. M. Levy, B. N. Bershad, E. D. Lazowska, The Interaction of Architecture and Operating System Design, In Proceedings of the fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108-120, 1991

No context found.

T.E. Anderson, H.M. Levy, B.N. Betshad, and E.D. Lazowska. "The Interaction of Architecture and Operating System Design". In Proc. of the Jth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 108-120, April 1991.

No context found.

Anderson, T. E., Levy, H. M., Bershad, B. N. and Lazowska, E. D. The interaction of architecture and operating system design. In Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, Santa Clara, California, ACM, 108-119, 1991.

No context found.

Anderson, T.E., Levy, H.M., Bershad, B.N. and Lazowska, E.D. "The Interaction of Architecture and Operating System Design," ASPLOS, September 1991.

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