H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd, Surviving the SOC Revolution: A Guide to Platform Based Design. Norwell, MA: Kluwer, 1999.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....architectural design team. The team then carries out a manual partitioning into chips or chipsets, writes a primary specification for the device and hand it over to chip development team. The team then starts with RTL coding to implement the chip while the algorithmic modeling is done in C or C [1]. But RTL level is too detailed to be efficient enough to meet the time to market requirement. Thus HW SW repartitioning, substituting better programmable VCs or custom hardware accelerator for part of the software become rather difficult. Therefore, if a design needs to evolve to deal with the ....

Chang, H., Cooke, L., Hunt, M., Martin, G., McNelly, A. and Tood, L. "Surviving the SOC Revolution: A Guide to Platform-Based Design", Kluwer Academic Publishrs, Boston, 1999.

.... deep submicron and nantechnology and new architectures such as networks on chips, application specific instruction set processors (ASIP) and new FPGA architectures, coincide with forces pushing towards standardization (new device structures, new architectures) The current trend towards platforms [2, 20] is a natural reaction to these forces and it indicates that the pendulum has not yet reached the culmination of the standardization wave. Adding the apparent insufficiency of traditional CPUs and the desire for standardization together, it is not remote to expect the emergence of standardized ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd. Surviving the SOC Revolution - A Guide to Platform-Based Design. Kluwer Academic Publishers, 1999.

..... 55 7 Conclusion 58 8 Perspective for NOC simulator 60 Appendix A: The NOS S source code in Tcl 62 Appendix B: The simple ns simulation example and extending ns 76 Appendix C: The installation of ns 83 iii List of Figures 1. 1 Primary Design Methodologies for SOC[2] . 2 1.2 Trade off among soft, firm and hard cores in SOC design(From[1] 4 1.3 Examples of today s SoC (From [1] 5 1.4 General architecture of totay s embedded core based system on a chip (From [1] ....

....for first production. Logic Logic Data Cache IF SRAM ROM ATM ROM MPEG RAM Core Core ASIC on DSM Complex ASIC with a few IPs Plug and play system on a chip Timing driven Design Block based Design Platform based Soft I F IP Figure 1. 1: Primary Design Methodologies for SOC[2] The NOCARC project co operated between KTH and Tekniska Hogskolan Jonkoping from Sweden, VTT Electronics from Finland develops a novel architecture platform, Network on Chip (NOC) based on PBD method, for future integrated telecommunication systems. NOC platform consists of an architectural ....

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Henry Chang,Larry Cooke, Merrill Hunt, etc., "Surviving the SOC revolution: a guide to platform-based design," Kluwer Academic Publishers, 1999.

....approaches attempt to raise the abstraction level for design entry, many experienced logic designers argue that these higher levels of abstraction do not address the underlying complexities required for efficient hardware implementations. Another approach has been to use block based design [7] where system designers can behaviorally model at the system level, and then partition and map design components onto specific hardware blocks which are then designed to meet timing, power, and area constraints. An example of this technique is the Xilinx System Generator for the MathWorks Simulink ....

....The Logic Foundry uses a platform based design approach. Platform based design starts at the system level and achieves its high productivity through extensive, planned design reuse . productivity is increased by using predictable, pre verified blocks that have standardized interfaces [7]. To facilitate the rapid implementation and deployment of these platform based designs, we have created a component based architecture that allows for run time control of processing elements. Using this architecture, an FPGA based DSP system can be easily constructed from pre built components and ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly and L. Todd, Surviving the SOC Revolution: A Guide to Platform-Based Design, Kluwer Academic Publishers, 1999.

....these approaches attempt to raise the abstraction level for design entry, many experienced logic designers argue that these higher levels of abstraction do not address the underlying complexities required for efficient hardware implementations. Another approach has been to use block based design [7] where system architects can behaviorally model at the system level, and then partition and map design components onto specific hardware blocks, which are then designed to meet timing, power, and area constraints. An example of this technique is the Xilinx System Generator for the MathWorks ....

....The Logic Foundry uses a platform based design approach. Platform based design starts at the system level and achieves its high productivity through extensive, planned design reuse . productivity is increased by using predictable, pre verified blocks that have standardized interfaces [7]. To facilitate the rapid implementation and deployment of these platform based designs, we have created a component based architecture that allows for runtime control of processing elements. Using this architecture, an FPGA based DSP system can be easily constructed from pre built components and ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly and L. Todd, Surviving the SOC Revolution: A Guide to Platform-Based Design, Kluwer Academic Publishers, 1999.

....platformbased designs composed of intellectual property cores. It was shown in [16] that the energy benefits of a router based communication architecture increase as the number of components present in the system increases. With next generation SoCs expected to have a large number of components [18], adopting a router based communication architecture can potentially lead to significant energy savings. Researchers have just begun to investigate the merits demerits of such an approach by analyzing and modeling the power consumption of routers and switches [19, 20] Efforts are also underway to ....

H. Chang, et al., Surviving the SOC Revolution: A Guide to Platform-Based Design. Kluwer Academic Publishers, Norwell, MA, 1999.

....quality software. Also, middleware such as CORBA [36, 26] now appears to be an industry standard for providing a transparent object reuse framework in a distributed environment. In parallel to these developments in the software domain, intellectual property (IP) reuse in System on a Chip (SoC) [11, 24] design is an emerging trend in the VLSI domain, which emphasises reusing IPs from vrious vendors in order to put entire systems on silicon. SoCs have been shown to provide better performance at reduced costs in comparison to the PCB based products of the 90 s. Even though component based ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd. Surviving the SOC revolution: a guide to platform based design. kluwer academic, 1999. 38

....tedious and error prone parts of the DTSE methodology are being supported by IMEC s ACROPOLIS ATOMIUM computer aided design (CAD) environment [22] 13] In this paper, we discuss the main steps of DTSE involved in producing power vs. speed software for each processor of a programmable platform [9] consisting of several processors and offering memory and interconnect reconfiguration opportunities [29] in the ideal case. 3.1 Data locality improving Loop Transformations Loop transformations are at the heart of DTSE. As one of the first steps (after preprocessing and pruning) in the script, ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd. Surviving the SOC Revolution : A Guide to Platform-Based Design. Kluwer Academic Publishers, ISBN 0-7923-8679-5, Nov. 1999.

....and have much better synthesis results. 2.4 Platform based Design System level design methodologies have become an important research topic in the last decade. Many new approaches have been proposed each addressing a particular part of the problem. A major new trend is platform based design [11][12] 16] An application is first described functionally, at the highest level of abstraction, and then mapped to a target platform architecture. The performance is evaluated and iterative refinements are performed to improve the system architecture to satisfy requirements. For example, processes ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly and L. Todd (1999) Surviving the soc revolution: a guide to platform based design, Kluwer Academic Publishers

....together, are viable alternatives when flexibility and variability is combined with performance and efficiency. The design of an integrated multicomputer system will extend the problems faced with current system on chip (SoC) design with system level and computer architecture design problems [2, 3]. Performance design with analyses, simulations and measurements have been studied and used in computer architecture design [4] In the codesign, the hardware complexity and software performance estimation based cost functions have been used [5] The efficient reuse and high utilization of the ....

Chang, H. et al., Surviving the SOC Revolution -- A Guide to Platform-Based Design, Kluwer Academic Publishers, 1999, 235 pp.

....a challenging task. While the availability of these heterogeneous components on a single platform provides the designer with increased exibility in mapping applications, ecient design requires an in depth understanding of their functionality,interactions, and possible tradeo s in co design [8, 15]. This work is supported by the DARPA Power Aware Computing and Communication Program under contract F33615 C 00 1633 monitored byWrightPatterson Air Force Base. State of the art methodologies adopt an ad hoc approach towards system design. Programming models and design tools for each hardware ....

H. Chang et al., \Surviving the SOC revolution - A guide to Platform-Based Design," Kluwer Academic Publisher, Boston, November 1999.

....co simulation and system synthesis than on high level system design. Design problems (e.g. improper application to architecture mapping, insufficient resources to meet the performance requirements, etc. detected during such co simulation leads to tedious and time consuming redesign of the system [6]. This work is supported by the US DARPA Power Aware Computing and Communication Program under contract F33615 C 00 1633 monitored by Wright Patterson Air Force Base. Programmable Processor Memory Subsystem DMA Configurable Logic Customized Logic High Speed Interconnect Fig. 1. A ....

H. Chang et al., "Surviving the SOC Revolution A Guide to Platform-Based Design," Kluwer Academic Publisher, Massachusetts, USA, 1999.

....approaches attempt to raise the abstraction level for design entry, many experienced logic designers argue that these higher levels of abstraction do not address the underlying complexities required for efficient hardware implementations. Another approach has been to use block based design [8] where system designers can behaviorally model at the system level, and then partition and map design components onto specific hardware blocks which are then designed to meet timing, power, and area constraints. An example of this technique is the Xilinx System Generator for the MathWorks Simulink ....

....The Logic Foundry uses a platformbased design approach. Platform based design starts at the system level and achieves its high productivity through extensive, planned design reuse . productivity is increased by using predictable, pre verified blocks that have standardized interfaces [8]. To facilitate the rapid implementation and deployment of these platformbased designs, we have identified four areas of integration as targets for improvement in a rapid prototyping environment for digital signal processing systems. These four areas are design flow integration, component ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly and L. Todd, Surviving the SOC Revolution: A Guide to Platform-Based Design, Kluwer Academic Publishers, 1999.

....links. Two commonly used on chip computer buses are AMBA [1] and CoreConnect [2] The notion of a data network on a chip is not new many networking chips integrate a switch fabric to accomplish the routing function. Some have proposed similar communication architectures for SOCs [3] Chang [4] provides a reasonable survey of the available communications topologies and protocols, and Lahiri [5] proposes a novel dynamic scheme for optimizing existing protocols. Rowson [6] presents a compelling case for separating the functionality of an IP core from its communications. The Virtual ....

....5.1 SOC Design Styles In the conventional design style, each SOC design is fairly unique. Even small derivatives off a base architecture require full design and verification cycles. There has been quite a bit of discussion in the electronics press about the benefits of design platforms for SOCs [4]. Most known examples are fairly rigid, in that the communications architecture is invariant across the uses of the platform. While this approach appears to work well in mature or low performance market segments, it is unlikely that the rigid platform will satisfy the needs of markets where the ....

H. Chang et al., Surviving the SOC Revolution: A Guide to Platform-Based Design. Kluwer Academic Publishers, Norwood, MA, 1999.

....latency and utilization of embedded patterns can be improved by and , respectively. 1. INTRODUCTION The increase in the complexity of integrated circuits and shorter time to market requirement results in the need to develop hardware platforms shared across multiple applications [1, 2, 3]. In the next generation of electronic systems, it is expected that the conventional embedded systems are unlikely to be sufficient to meet the timing, power, and cost demanded by the applications. The diversity and increasing number of applications do not allow the fully customized system design ....

....to implement an application in a particular domain on a platform based system, partial reconfiguration of the system is needed for remaining customization. In addition, the system has to be capable of handling future applications of that domain only by minor effort and modification in the system [1, 3]. Such a system consists of fixed cores and reconfigurable (or flexible) components. The fixed components are optimized for speed, performance and density. The reconfigurable components enable the implementation of different resources needed by multiple applications. Therefore, the increased ....

H. Chang, et al., "Surviving the SOC Revolution: A Guide to Platform-Based Design", Kluwer Academic Publishers, 1999.

....Selection in Programmable Systems 1. INTRODUCTION Increasing number of complex integrated circuits and shorter timeto market requirement result to develop hardware platforms shared across multiple applications [1, 2]. In the next generation of electronic systems, it is expected that the conventional embedded systems are unlikely to be sufficient to meet the timing, power, and cost of such systems. Diversity and increasing number of applications do not allow to go for fully customized system design methodology ....

....developed to combine reconfiguration in system design for future applications. Platform based design supports a group of applications mostly in the same domain. In addition, the system has to be capable of handling future applications of that domain only by minor effort and modification in system [1, 2]. Another important issue which requires programmability and re use in future system is the high cost of system design and maufacturing. A platform based System is shared among set of applications mostly in the same domain such as multimedia, networking, encryptography, etc. A platform based ....

H. Chang, et al.. "Surviving the SOC Revolution: A Guide to Platform-Based Design". Kluwer Academic Publishers, 1999.

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Chang, H., Cooke, L., Hunt, M., McNelly, A., Martin, G. and Todd, L., Surviving the SOC Revolution: A Guide to Platform-Based Design, Kluwer, 1999.

....be shared across several designs so that the development cost, which is also increasing by leaps and bounds as manufacturing processes evolve below the .2 micron barrier, could be amortised over a large number of units. This alignment in planets is the cause of the birth of platform based design [1,2] where re use and programmability are the name of the game. Programmability here will also extend to hardware implementation with the advent of embedded FPGA that will allow a system designer to use another design trade off point where functionalities can be allocated to programmable hardware ....

H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly and L. Todd, Surviving the SOC Revolution: A Guide to PlatformBased Design, Kluwer Academic Publishers: November, 1999.

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H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd, Surviving the SOC Revolution: A Guide to Platform Based Design. Norwell, MA: Kluwer, 1999.

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Henry Chang, Larry Cooke, Merrill Hunt, Grant Martin, Andrew McNelly, and Lee Todd. Surviving the SOC Revolution - A Guide to Platform-Based Design. Kluwer Academic Publishers, 1999.

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H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd. Surviving the SOC Revolution - A Guide to Platform-Based Design. Kluwer Academic Publishers, 1999.

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H. Chang et al., Surviving the SOC Revolution---A Guide to Platform-Based Design," Kluwer Academic, Norwell, Mass., 1999.

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H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, L. Todd. Surviving the SOC Revolution: A Guide to Platform Based Design, Kluwer Academic Publishers, 1999.

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H. Chang, L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd, "Surviving the SOC Revolution: A Guide to Platform-Based Design", Kluwer Academic Publishers, 1999.

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Henry Chang, Larry Cooke, Merrill Hunt, Grant Martin, Andrew McNelly, and Lee Todd. Surviving the SOC Revolution - A Guide to Platform-Based Design. Kluwer Academic Publishers, 1999.

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