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O'Malley, T.O., Richardson, D.J., and Dillon, L.K. "Efficient Specification-Based Test Oracles", in Proc. of the Second California Software Symposium (CSS'96). April 1996.

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This paper is cited in the following contexts:
Automata-Based Verification of Temporal Properties on.. - Giannakopoulou, Havelund (2001)   (12 citations)  (Correct)

....Jtrek makes it possible to easily read Java class files (byte code files) and traverse them as abstract syntax trees while examining their contents, and inserting new code. Program monitoring against specifications expressed in various logics has been investigated by several researchers. In [8], for example, the authors describe an algorithm for generating test oracles from specifications written in GIL, a graphical interval logic. Similarly to our approach, the oracles are based on automata. The generation is performed in two phases. During the first phase, a hierarchical ....

O'Malley, T.O., Richardson, D.J., and Dillon, L.K. "Efficient Specification-Based Test Oracles", in Proc. of the Second California Software Symposium (CSS'96). April 1996.


Verisim: Formal Analysis of Network Simulations - Bhargavan, Gunter, Kim, Lee, .. (2000)   (5 citations)  (Correct)

....is discussed in [25] together with examples in Real Time Interval Logic (RTIL) and Z. Papers [7, 6, 8] describe a trace analysis tool for LOTOS requirements, while [12] describes a similar tool for Estelle requirements. Generating test oracles for Graphical Interval Logic (GIL) is discussed in [11, 21]. An equivalent problem for a safe fragment of Linear Temporal Logic is discussed in [16] This fragment is expressively similar to the requirements language of Verisim. However, an important feature that distinguishes Verisim from most of the above work is its focus on integration of simulation ....

T.O. O'Malley, D.J. Richardson, and L.K. Dillon. Efficient Specification-Based Test Oracles. In Second California Software Symposium (CSS'96), April 1996. 24


What Packets May Come: Automata for Network Monitoring - Bhargavan, Chandra.. (2001)   (7 citations)  (Correct)

....Formal specification and automatic verification have also been used in the context of telecommunications systems [6, 4] Our work differs from these in that we are not attempting to generate test cases but rather to monitor the correctness of an implementation during deployment. O Malley et al. [10] discuss the creation of property checking automata from a graphical specification notation. Event specifications [8] have been used for run time property verification, and the Verisim tool [2] applies this work to properties of network protocols. However, all of these systems assume a co located ....

T.O. O'Malley, D.J. Richardson, and L.K. Dillon. Efficient specification-based test oracles. In Second California Software Symposium (CSS'96), April 1996.


Verisim: Formal Analysis of Network Simulations - Bhargavan, Gunter, Kim, Lee, .. (2000)   (5 citations)  (Correct)

....is discussed in [24] together with examples in Real Time Interval Logic (RTIL) and Z. Papers [6, 5, 7] describe a trace analysis tool for LOTOS requirements, while [11] describes a similar tool for Estelle requirements. Generating test oracles for Graphical Interval Logic (GIL) is discussed in [10, 20]. An equivalent problem for a safe fragment of Linear Temporal Logic is discussed in [15] This fragment is expressively similar to the requirements language of Verisim. However, an important feature that distinguishes Verisim from most of the above work is its focus on integration of simulation ....

T.O. O'Malley, D.J. Richardson, and L.K. Dillon. Efficient Specification-Based Test Oracles. In Second California Software Symposium (CSS'96), April 1996.

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