J. Veenstra and R. Fowler. "A Front End for Efficient Simulation of Shared-Memory Multiprocessors." Intl. Wksp. on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, pages 201-207, January 1994.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....Table 1 only. We do not estimate overall application speedups because they are dependent on the efficiency of the parallel execution of the rest of the code. 5.2 Architecture Simulated The evaluation is based on execution driven simulations. Our simulation environment uses an extension to MINT [27] that includes a superscalar processor model [9] and supports dynamic spawn, squash, restart, and retire of light weight threads. The processor model is a 4 issue dynamic superscalar with register renaming, branch prediction, and non blocking memory operations. Some of its parameters are shown in ....

J. Veenstra and R. Fowler. "A Front End for Efficient Simulation of Shared-Memory Multiprocessors." Intl. Wksp. on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, pages 201-207, January 1994.

....runs more efficiently in parallel. Once the loop is instrumented, we perform detailed execution driven simulations. In our base experiments, each thread is composed of a single loop iteration. 4. 2 Simulation Environment Our execution driven simulation environment is based on an extension to MINT [21] that includes a superscalar processor model with non blocking memory operations [10] and supports dynamic spawn, squash, restart, and retire of light weight threads. We use these threads to attempt speculative parallelization on the loops in Table 3. The processor model is that of a 4 issue ....

J. Veenstra and R. Fowler. "A Front End for Efficient Simulation of Shared-Memory Multiprocessors." Intl. Wksp. on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, pages 201-207, January 1994.

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