M. Gupta and R. Nim. "Techniques for Run-Time Parallelization of Loops." Supercomputing, November 1998. Home/Search Document Not in Database Summary Related Articles Check |
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Eliminating Squashes Through Learning Cross-Thread.. - Cintra, Torrellas (2002) (5 citations) (Correct)
....data dependences, such as those that contain pointer accesses, references to arrays with non linear subscripts, very irregular control flow, or accesses across complicated procedure calling patterns. To extract parallelism in such codes, speculative thread level parallelization has been proposed [1, 4, 6, 7, 8, 10, 12, 18, 19, 20, 22, 23, 25, 26, 32]. In this approach, potentially dependent threads are speculatively executed in parallel, hoping not to violate dependences. If a cross thread dependence is violated at run time, a corrective action is triggered to repair the state. Such an action often involves squashing one or several threads. ....
....to repair the state. Such an action often involves squashing one or several threads. Proposed schemes for speculative parallelization differ in many ways. For example, some schemes rely on support code inserted by the compiler to check for dependence violations and to perform corrective actions [7, 19, 20]. Other schemes rely on special hardware to perform some or all of these operations [1, 4, 6, 8, 10, 12, 18, 22, 23, 25, 26, 32] This work was supported in part by the National Science Foundation under grants CCR 9970488, EIA 0081307, and EIA 0072102; by DARPA under grant F30602 01 C 0078; ....
M. Gupta and R. Nim. "Techniques for Run-Time Parallelization of Loops." Supercomputing, November 1998.
Architectural Support for Scalable Speculative.. - Cintra, Martinez.. (2000) (26 citations) (Correct)
....these codes. Some software schemes analyze the dependence structure of the code at run time and try to run parts of it in parallel protected by synchronization (for example [13] Other software schemes speculatively run the code in parallel and later recover if a dependence violation is detected [5, 15]. While these techniques are certainly promising, they all have various amounts of software overhead, which may limit their scalability. On the hardware side, there have been several proposals for single chip speculative multithreaded or multiprocessor architectures [4, 7, 11, 14, 16, 17, 20] In ....
M. Gupta and R. Nim. "Techniques for Run-Time Parallelization of Loops." Supercomputing, November 1998.
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