| E.M. Clarke, T. Filkorn and S. Jha. Exploiting symmetry in temporal logic model checking. Fifth International Conference on ComputerAided Verification, June 1993. |
....with a quotient structure in which states are replaced by orbit representatives (see, for example [16] However this approach is, in most cases, not practical, as nding orbit representatives is hard. Indeed, the orbit problem as it is known, is as hard as the graph isomorphism problem [17]. Symmetry can also be used to reduce the number of cases that need to be checked when verifying a set of parameterised properties of a (parameterised) system. This use of symmetry is very di erent from that described previously in this case we are not concerned with the number of states to be ....
....contained thereof) is invariant under G, then M; s j= MG ; s) j= 12] The applicability of this approach is limited for two reasons. First, nding a suitable symmetry group G is dicult (calculation of the entire automorphism group is as computatationally complex as graph isomorphism [17]) However if processes p i , i = 1; 2; k are isomorphic then Aut M = Aut CR, where CR is the process communication graph for P k , and Aut CR is often relatively easy to compute. Second, another restriction of this approach is the requirement that be invariant under G. In many cases ....
E.M. Clarke, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. In C. Courcoubetis, ed. Proc. CAV `93, vol. 697 LNCS, pp. 450-461, 1993. SpringerVerlag.
....cation. Conclusions are presented in section 5. 1. 1 Overview of results Symmetry One approach that has been investigated to avoid state space problems is the use of symmetry to replace a state graph with a quotient structure in which states are replaced by orbit representatives (see, for example [16]) However this approach is, in most cases, not practical, as nding orbit representatives is hard. Indeed, the orbit problem as it is known, is as hard as the graph isomorphism problem [17] Symmetry can also be used to reduce the number of cases that need to be checked when verifying a set of ....
....is rst investigated within the context of Petri Nets [40, 57] Ip and Dill [45] apply these ideas to the automatic veri cation of nitestate systems and introduce a new data type, scalarset, to the Mur protocol description language to imply symmetries within a state space. Clarke et al. [16] and Emerson and Sistla [30] discuss symmetry reduction for systems when the transition relation is given either explicitly in terms of states or symbolically as a BDD. Their results are summarised in [20] The complexity of the orbit problem and examples of groups where the orbit problem is ....
E.M. Clarke, R. Enders, T. Filkhorn, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1-2):77-104, 1996.
....a structural relationship, such as simulation [Mil71] or bisimulation [Par81] This guarantees that if the transformed property holds on the abstract program, then the original property holds on the concrete program. Common examples of abstraction are those resulting from symmetry reduction [ES93,CFJ93] data independence [Wol86] and predicate abstraction [GS97] Recently, several algorithms [RRR00,Nam01,PPZ01,TC02] have been developed that automatically generate a deductive proof of correctness from a model checker; such proofs have many applications, which are mentioned in these papers. In ....
E. M. Clarke, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. In CAV, volume 697 of LNCS, 1993.
....of model checking is strongly restricted by the state explosion problem. Thus, each of the two valued models obtained via the translation can be reduced using the following methods: partial order reductions [Pel96,Val89,GKPP99,PSGK00] symmetry reductions [ES95] abstraction techniques [DGG94,CFJ93] and BDD based symbolic storage methods, Bry86,Bry95,McM95] Moreover, our translation can be combined with SAT related methods of model checking [BCCZ99,PWZ02a,PWZ02b] It is easy to notice that there is no need to make any changes to the above methods in order to use them in our approach. ....
E. M. Clarke, T. Filkorn, and S. Jha, Exploiting symmetry in temporal logic model checking, Proc. of CAV'93, LNCS, vol. 697, Springer-Verlag, 1993, pp. 450--462.
....approach to the formal verification of concurrent systems, has become more and more popular. Model checking has also been used to verify real time systems. Timed automata [5] has been widely used as the system model for verifying realtime properties specified in Timed Computation Tree Logic (TCTL) [9, 16]. Concurrency is generally modeled as the interleaving of computation sequences [22] This causes state space explosions [23] and the large sizes of the statespaces become unmanageable, thus hindering verification. As a result, both the degree of concurrency and the complexity of systems ....
....become unmanageable, thus hindering verification. As a result, both the degree of concurrency and the complexity of systems verifiable are limited. Several techniques have been proposed in the literature for reducing the state space size. Some of the techniques include symmetry based reductions [9, 12, 11], partial order reductions [25, 14, 22, 26, 23, 15] bisimulation equivalences [24] minimization techniques [4, 7] etc, which will be discussed in more details in Section 2. Such reduction techniques usually require years of studying to master and are typically implemented with sophisticated ....
[Article contains additional citation context not shown here]
E. M. Clarke, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. In Lecture Notes in Computer Science, volume 697, 1993.
....of deciding if two states belong to the same equivalence class or orbit. This involves in practice to find a canonical state that represents every state of an orbit by permuting symmetric data of state representations. This problem has been shown to be at least as hard as testing graph isomorphism [3]. Heuristics like the use of normalized states [2,13] have been proposed. Several normalized states can represent an orbit leading to a less complex suboptimal symmetry reduction. For a concise overview of symmetry reduction approaches we refer to [12] The process of verifying a system can be ....
E. Clarke, R. Enders, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, (9):77--104, 1993.
....goal is to reduce the amount of memory used in storing the examined states. In several message passing protocols, the reductions of state space sizes are from 30 to more than 90 . Less time is used for most of the protocols, also. Our new method also complements the symmetry reduction strategy [9, 2, 5], allowing for additional reductions when the two methods are combined. 2 An Example In this section, we illustrate our method through a cache coherence protocol [12] Cache coherence is a way of implementing a shared memory abstraction on top of a message passing network. Whenever a processor ....
E. Clarke, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. 5th International Conference on ComputerAided Verification, June 1993.
.... the complexity deriving from the use of timing information (e.g. in the form of clocks and comparisons amongst clocks) The research community on veri cation technology has developed data structures (e.g. Reduced Ordered Binary Decision Diagrams [21] and a variety of tech39 niques (see, e.g. [13,20,26]) to alleviate the explosion in the number of control states deriving from cooperative concurrency. Similarly, e cient data structures have been developed to handle timing information (e.g. DBMs [33] However, the development of e cient data structures and techniques to handle at the same time ....
E. M. Clarke, T. Filkorn, and S. Jha, Exploiting symmetry in temporal logic model checking, in Courcoubetis [30], pp. 450462.
.... the truth value of any guard is the same in both s and (s) Hence there is complete symmetry among the user processes in any size instance of a (C; U) family, and the PMCP for formulas of type (2) and (3) reduces that for formulas of type (1) The following lemmas are based on those in [ES 93, CFJ 93] cf. ID 93] Let f(i) be a CTL formula with propositions over the states of C and over the states of U indexed with i, and let f(i; j) be a CTL formula with propositions over the states of C and over the states of U indexed with either i or j. i f(i) iff G n ; Gn j= f(1) i;j:i6=j ....
....Lemma 5.3 [EN 96] The abstract graph simulates every instance of the family. Every finite path in the abstract graph corresponds to a finite computation of some instance. The paper also shows how to check properties of the form Ag(i) by reducing them, using symmetry arguments (cf. ES 93] CFJ 93] to checking a property Ag(0) of the control process in a modified control user system, which has the same user process, but has C = C k U as the new control process. 5.4 Implementation Details The behavior of the bus and the units as specified in the protocol is coded as a SMV [McMillan ....
[Article contains additional citation context not shown here]
Clarke, E. M., Filkorn, T., Jha, S. Exploiting Symmetry in Temporal Logic Model Checking, 5th CAV, Springer-Verlag LNCS 697.
.... the state explosion problem in verifying finite state systems, either by symbolic representation of the states space using BDDs [5] by application of partial order methods [10, 18] which suppresses unnecessary interleavings of transitions, or by application of abstractions and symmetries [6, 7, 9]. These techniques have been further extended to deal with timed systems, e.g. 4, 12] 17] 8] However, when applying these techniques to parallel systems such as Fischer s protocol, a potential explosion in the global state space remains. In [2] a compositional verification technique is ....
E. M. Clarke, T. Filkorn, and S. Jha. Exploiting Symmetry in Temporal Logic Model Checking. 697, 1993. In Proc. of CAV'93.
....Denmark. E mail: kgl iesd.auc.dk. Department of Computer Systems, Box 325, Uppsala University, S751 05, Uppsala, Sweden. E mail: fpaupet,yig docs.uu.se. partial order methods [2, 3] which suppresses unnecessary interleavings of transitions, or by application of abstractions and symmetries [4, 5, 6]. In the last few years, model checking has been extended to real time systems, with time considered to be a dense linear order. A timed extension of finite automata through addition of a finite set of realvalued clock variables has been put forward [7] so called timed automata) and the ....
E. M. Clarke, T. Filkorn, and S. Jha. Exploiting Symmetry in Temporal Logic Model Checking. Lecture Notes in Computer Science, 697, 1993. In Proceedings of CAV'93.
.... either by symbolic representation of the states space such as in [HNSY92] and in the use of Binary Decision Diagrams [BCM 90] by application of partial order methods [GW91, Val90] which suppresses unneccesarry interleavings of transitions, or by application of abstractions and symmetries [CFJ93, CGL92, EJ93] So far the most successful results for larger systems have been obtained using the heuristics of Binary Decision Diagrams. However, recent work by Andersen [And95] introduces a new very promising heuristic model checking technique for finite state systems, for which experimental ....
E. M. Clarke, T. Filkorn, and S. Jha. Exploiting Symmetry in Temporal Logic Model Checking. Lecture Notes in Computer Science, 697, 1993.
.... invisible . We illustrate the method on a non trivial example of a cache protocol, provided by Steve German. 1 Introduction Automatic veri cation of in nite state systems in general, and parameterized systems in particular, have been the focus of much research recently (see, e.g. ES96,ES97,CFJ96,GS97,ID96,LS97,RKR 00] Most of this research concentrates on model checking techniques for veri cation of such systems, using symmetry reduction and similar methods to make model checking more tractable. In this paper we present a method for the automatic veri cation of a certain class of ....
....con gurations of processes as a word in a regular language. Unfortunately, many of the systems analyzed by this method cause the analysis procedure to diverge and special acceleration procedures have to be applied which, again, requires user ingenuity and intervention. The works in [ES96,ES97,CFJ96,GS97] study symmetry reduction in order to deal with state explosion. The work in [ID96] detects symmetries by inspection of the system description. Perhaps the closest in spirit to our work is the work of McMillan on compositional model checking (e.g. McM98] which combines automatic ....
E.M. Clarke, , R. Enders T. Filkron, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1/2), 8
....con gurations of processes as a word in a regular language. Unfortunately, many of the systems analyzed by this method cause the analysis procedure to diverge and special acceleration procedures have to be applied which, again, requires user ingenuity and intervention. The works in [ES96,ES97,CEFJ96,GS97] study symmetry reduction in order to deal with state explosion. The work in [ID96] detects symmetries by inspection of the system description. Closer in spirit to our work is the work of McMillan on compositional model checking (e.g. McM98b] which combines automatic abstraction with ....
E.M. Clarke, R. Enders, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1/2), 1996.
....to avoid. Therefore, most approaches proceed by listing sucient conditions that can be statically checked on the system description. The second problem, of detecting equivalence of states, involves the search for a canonical state by permuting the values of certain, symmetric, data structures. In [4] it was shown that this orbit problem is at least as hard as testing for graph isomorphism, for which currently no polynomial algorithms are known. Furthermore, this operation must be performed for every state encountered during the exploration. For these reasons, it is of great practical ....
....checking in [10] with extensions to fairness in [13] and [15] In [11] Emerson and Tre er extended the concepts to real time logics, while in [12] they considered systems that are almost symmetric. Clarke, Enders, Filkorn, and Jha used symmetries in the context of symbolic model checking in [4]. Emerson, Jha, and Peled, and more recently Godefroid, have studied the combination of partial order and symmetry reductions, see [9, 14] Our work draws upon the ideas of Dill and Ip [17 19] They introduce, in the protocol description language Mur , a new data type called scalarset by which the ....
[Article contains additional citation context not shown here]
E.M. Clarke, R. Enders, T. Filkorn, S. Jha, Exploiting symmetry in temporal logic model checking, Formal Methods in System Design, Vol. 19, 77-104, 1996.
....Among the techniques being developed for countering this problem are partial order methods, abstraction, compositional approaches, and symmetry reductions. Symmetries abound in hardware circuits, distributed algorithms and concurrent programs. Emerson and Sistla [ES96] and Clarke et al. [CEFJ96] show how symmetries in Kripke structures and CTL formulas allow the construction of a smaller sized quotient structure such that the formula need be verified only for the quotient. In both works, symmetries are specified by hand by the designer. Emerson and Sistla [ES95] have developed theory ....
....hAP i denotes any proposition p 2 AP , S denotes a set of state formulas, and P denotes a set of path formulas. If M = S; R; K) is a Kripke structure, M; s j= f) denotes that the state formula f is true for state s 2 S. Similarly, M; j= g) denotes that path formula g is true for path . See [CEFJ96] for a formal definition of j= using this notation. We say that two CTL formulas are logically equivalent if their truth values are identical for every state in any Kripke structure. We say that two CTL formulas are structurally equivalent if they also have isomorphic parse trees. Intuitively, ....
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E. M. CLARKE, R. ENDERS, T. FILKORN, AND S. JHA. Exploiting Symmetry in Temporal Logic Model Checking. Formal Meth. in Sys. Design, 9(1/2):77--104, 1996.
....Ili Abstract. Model checking is a useful technique to verify properties of dynamic systems but it has to cope with the state explosion problem. By simultaneous exploitation of symmetries of both the system and the property, the model checking can be performed on a reduced quotient structure [2,6,7]. In these techniques a property is specified within a temporal logic formula (CTL ) and the symmetries of the formula are obtained by a syntactical checking. We show here that these approaches fail to capture symmetries in the LTL path subformulas. Thus we propose a more accurate method based ....
....of permutations preserving the state graph and the formula. In practice, the permutations act on a set of system processes with identical behavior. Previous works have been already developed focusing on the safeness properties [1,14,17,19] Other developments include model checking algorithms [2,13], model checking under fairness constraints [8] and application to system bisimulation [16] LIP6 CNRS ERS 587 Univ. Pierre Marie Curie, Tour 65 66, Bureau 204, 4, place Jussieu, 75252 Paris Cedex 05 e.mail: Khalil.Ajami lip6.fr, Jean Michel.Ilie lip6.fr LAMSADE CNRS URA 825 ....
E. Clarke, T. Filkorne, S. Jha, "Exploiting Symmetry In Temporal Logic Model Checking", 5th Computer Aided Verification (CAV), June 1993.
.... 1, the truth value of any guard is the same in both s and (s) Hence there is complete symmetry among the user processes in any size instance of a (C; U) family, and the PMCP for formulae of type (2) and (3) reduces that for formulae of type (1) The following lemmas are based on those in [ES 93, CFJ 93] cf. ID 93] Let f(i) be a CTL formula with propositions over the states of C and over the states of U indexed with i, and let f(i; j) be a CTL formula with propositions over the states of C and over the states of U indexed with either i or j. Lemma 6 For n 1, G n ; Gn j= V i f(i) iff G ....
Clarke, E.M., Filkorn, T., Jha, S. Exploiting Symmetry in Temporal Logic Model Checking, 5th CAV, Springer-Verlag LNCS 697.
....Lemma 3 [EN 96] The abstract graph simulates every instance of the family. Every finite path in the abstract graph corresponds to a finite computation of some instance. The paper also shows how to check properties of the form V i Ag(i) by reducing them, using symmetry arguments (cf. ES 93, CFJ 93] to checking a property Ag(0) of the control process in a modified controluser system, which has the same user process, but has C 0 = C k U as the new control process. 4 Implementation Details The behavior of the bus and the units as specified in the protocol is coded as a SMV [McM 92] ....
Clarke, E. M., Filkorn, T., Jha, S. Exploiting Symmetry in Temporal Logic Model Checking, 5th CAV, Springer-Verlag LNCS 697.
.... state space compression, such as lumping [59] or bisimulation [60,7] are often counterproductive in the MTBDD setting, i.e. the size of the symbolic representation grows although the number of states and transitions shrinks (in the non stochastic case a similar observation has been made in 53 [61]) One reason for this increase is that bisimulation on MTSs, CPSs, or SPTSs cumulates transitions by adding up the respective parameters. This implies that, while the minimised model may have far fewer transitions than the original one, the former involves more distinct parameters than the ....
E. M. Clarke, S. Jha, R. Enders, T. Filkorn, Exploiting symmetry in temporal logic model checking, Formal Methods in System Design 9 (1/2) (1996) 77--104.
....to one of any larger size. EN 95] shows that the computation trees of process 0 in rings of size 2 and of size n, n 2, are stuttering bisimilar. It follows that a property over process 0 is true of all sizes of rings iff it is true of the ring of size 2. From symmetry arguments (cf. ES 93,CFJ 93] a property holds of all processes iff it holds for process 0. The proof given in the paper uses the [BCG 88] definition and is quite lengthy; we indicate here how to use well founded bisimulation. Each process alternates between blocking receive and send token transfer actions, with a finite ....
Clarke, E.M., Filkorn, T., Jha, S. Exploiting Symmetry in Temporal Logic Model Checking, 5th CAV, Springer-Verlag LNCS 697.
....configurations of processes as a word in a regular language. Unfortunately, many of the systems analyzed by this method cause the analysis procedure to diverge and special acceleration procedures have to be applied which, again, requires user ingenuity and intervention. The works in [ES96,ES97,CEFJ96,GS97] study symmetry reduction in order to deal with state explosion. The work in [ID96] detects symmetries by inspection of the system description. Closer in spirit to our work is the work of McMillan on compositional model checking (e.g. McM98b] which combines automatic abstraction with ....
E.M. Clarke, R. Enders, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1/2), 1996.
....Lemma 3. EN 96] The abstract graph simulates every instance of the family. Every finite path in the abstract graph corresponds to a finite computation of some instance. The paper also shows how to check properties of the form V i Ag(i) by reducing them, using symmetry arguments (cf. ES 93] CFJ 93] to checking a property Ag(0) of the control process in a modified control user system, which has the same user process, but has C 0 = C k U as the new control process. 4 Implementation Details The behavior of the bus and the units as specified in the protocol is coded as a SMV [McM 92] ....
Clarke, E. M., Filkorn, T., Jha, S. Exploiting Symmetry in Temporal Logic Model Checking, 5th CAV, Springer-Verlag LNCS 697.
....[20, 17] The former class of tools relies on applying various static analyses such as slicing [27] and abstract interpretation [11] in order to curb the state space explosion. Speci c to the latter category are on the y optimizations such as partial order reductions [23] and symmetry reductions [2]. A central issue in state space reduction is the question of property preservation. Using temporal logic as speci cation language divides state space reduction techniques into: simulation (weakly) preserving and bisimulation (strongly) preserving transformations. Simulation preserving ....
....in temporal logics [5] Structural symmetries induce an equivalence relation on states. In practice, determining the symmetry equivalence has been shown to produce a good under approximation of the bisimulation relation. Unfortunately, the general problem of computing symmetry equivalence classes [2] (the orbit problem) has no polynomial time solution. In general this makes it too costly to perform during model checking. Our approach to symmetry reductions is novel in that it exploits the shape of the heap con guration to achieve the optimal reduction for the entire class of heap symmetries. ....
[Article contains additional citation context not shown here]
E. M. Clarke, T. Filkorne, S. Jha. Exploiting Symmetry In Temporal Logic Model Checking, Proc. 5th Conference on Computer Aided Verication (1993), LNCS 697, pp. 450 - 462.
....to avoid. Therefore, most approaches proceed by listing sucient conditions that can be statically checked on the system description. The second problem, of detecting equivalence of states, involves the search for a canonical state by permuting the values of certain, symmetric, data structures. In [4] it was shown that this orbit problem is at least as hard as testing for graph isomorphism, for which currently no polynomial algorithms are known. Furthermore, this operation must be performed for every state encountered during the exploration. For these reasons, it is of great practical ....
....logics, while in [12] they considered systems that are almost symmetric and they also adapted the method for nding a canonical representative from [10] in the context of symbolic model checking. Clarke, Enders, Filkorn, and Jha used symmetries in the context of symbolic model checking in [4] where they proposed a heuristic involving multiple representatives of equivalence classes. Emerson, Jha, and Peled, and more recently Godefroid, have studied the combination of partial order and symmetry reductions, see [9, 14] Our work draws upon the ideas of Dill and Ip [17 19] They ....
[Article contains additional citation context not shown here]
E.M. Clarke, R. Enders, T. Filkorn, S. Jha, Exploiting symmetry in temporal logic model checking, Formal Methods in System Design, Vol. 19, pp. 77-104, 1996.
....domain method (cf. HB95] Thus, our algorithm is strictly more powerful than the finite domain methods. var x : natural initially x = 0 action a[i : natural] x i) x : i 5. 2 Symmetric Programs Bisimulation reductions for semantically symmetric programs have been proposed in [ES93,CFJ93] It is computationally difficult, however, to implement such reductions symbolically (i.e. with BDD s) CFJ93] Hence, ET99] consider syntactically symmetric programs, defined using symmetric predicates such as 3 A similar tradeoff occurs in finite domain [PRSS99] vs. predicate abstraction ....
....var x : natural initially x = 0 action a[i : natural] x i) x : i 5. 2 Symmetric Programs Bisimulation reductions for semantically symmetric programs have been proposed in [ES93,CFJ93] It is computationally difficult, however, to implement such reductions symbolically (i.e. with BDD s) CFJ93] Hence, ET99] consider syntactically symmetric programs, defined using symmetric predicates such as 3 A similar tradeoff occurs in finite domain [PRSS99] vs. predicate abstraction [SGZ 98] approaches to verifying combinational circuits over integer variables. 8i : P (i) The reduction ....
E.M. Clarke, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. In CAV, volume 697 of LNCS, 1993.
.... correctness properties for parameterized systems are of the forms : every process i satisfies f(i) or every distinct pair of processes (i; j) satisfies f(i; j) Such properties may be reduced to checking properties of the control process of a modified system using symmetry results from [ES 93, CFJ 93] 5.1.1 Broadcast Protocols The broadcast model is appropriate for analyzing busbased hardware protocols such as those for cache coherency. For simplicity, we consider protocols where the state change in response to a broadcast is deterministic. The system is defined as a control user system ....
Clarke, E.M., Filkorn, T., Jha, S. Exploiting Symmetry in Temporal Logic Model Checking, 5th CAV, LNCS 697.
.... invisible . We illustrate the method on a non trivial example of a cache protocol, provided by Steve German. 1 Introduction Automatic verification of infinite state systems in general, and parameterized systems in particular, have been the focus of much research recently (see, e.g. ES96, ES97, CFJ96, GS97, ID96, LS97, RKR 00] Most of this research concentrates on model checking techniques for verification of such systems, using symmetry reduction and similar methods to make model checking more tractable. In this paper we present a method for the automatic verification of a certain ....
....of processes as a word in a regular language. Unfortunately, many of the systems analyzed by this method cause the analysis procedure to diverge and special acceleration procedures have to be applied which, again, 2 requires user ingenuity and intervention. The works in [ES96, ES97, CFJ96, GS97] study symmetry reduction in order to deal with state explosion. The work in [ID96] detects symmetries by inspection of the system description. Perhaps the closest in spirit to our work is the work of McMillan on compositional model checking (e.g. McM98] which combines automatic ....
E.M. Clarke, , R. Enders T. Filkron, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1/2), 8
....community. Given this context, research is being carried out with the goal of potentially increasing the number of systems that can be verified through model checking. We can identify three possible ways to attack this problem: reducing the size of the model (e.g. with abstraction [6] symmetry [8], decomposition [12] reducing the size of the formulas (with a rewrite system) 9] and developping more efficient verification algorithms where the size of the model and of the formula have a smaller impact on the verification activity [11, 2] The research presented in this paper belongs to ....
E.M. Clarke, T.Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking.
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Clarke E. M., Filkorn T. and Jha S. [1993], Exploiting symmetry in temporal logic model checking, in C. Courcoubetis, ed., `Proc. 5th Workshop on Computer Aided Veri cation (CAV '93)', Vol. 697 of LNCS, Springer, Elounda, Crete.
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E.M. Clarke, T. Filkorn and S. Jha. Exploiting symmetry in temporal logic model checking. Fifth International Conference on ComputerAided Verification, June 1993.
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E. M. Clarke, R. Enders, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1-2):77--104, 1996.
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E. Clarke, R. Enders, T Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, (9):77--104, 1993.
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E. Clarke, R. Enders, T Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, (9):77--104, 1993.
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E. M. Clarke, S. Jha, R. Enders, T. Filkorn, Exploiting symmetry in temporal logic model checking, Formal Methods in System Design 9 (1/2) (1996) 77--104.
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E.M. Clarke, R.Enders, T. Filkorn, and S. Jha. Exploiting symmetry in temporal logic model checking. In Formal Methods in System Design, pages 77--104, 1996.
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Edmund M. Clarke, Thomas Filkorn, and Somesh Jha. Exploiting symmetry in temporal logic model checking. In Proceedings of 5th International Conference on Computer Aided Verification, pages 450--462, 1993.
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Edmund M. Clarke, Robert Enders, Thomas Filkorn, and Somesh Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9:77--104, 1996.
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E. M. Clarke, S. Jha, R. Enders, and T. Filkorn. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1/2):77-104, 1996.
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Clarke, E. M., Filkorn, T., Jha, S.: Exploiting Symmetry in Temporal Logic Model Checking. CAV93, LNCS 697 Springer-Verlag, 1993.
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Edmund M. Clarke, Robert Enders, Thomas Filkorn, and Somesh Jha. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9:77--104, 1996.
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E. M. Clarke, S. Jha, R. Enders, and T. Filkorn. Exploiting symmetry in temporal logic model checking. Formal Methods in System Design, 9(1/2):77-104, 1996.
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Clarke, E. M., Enders, R., Filkorn, T., and Jha, S., Exploiting Symmetry in Temporal Logic Model Checking. In Formal Methods in System Design, Kluwer, vol. 9, no. 1/2, August 1996.
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Clarke, E. M., Filkorn, T., Jha, S. Exploiting Symmetry in Temporal Logic Model Checking, 5th CAV, Springer-Verlag LNCS 697.
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