An-Chow Lai and Babak Falsafi. Selective, accurate, and timely self-invalidation using lasttouch prediction. In ISCA '00: Proceedings of the 27th annual international symposium on Computer architecture, pages 139--148, New York, NY, USA, 2000. ACM Press.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....second paper, Acacio et al. studied a single level predictor to predict sharers [2] Bilir et al. 7] studied multicast snooping with a 4K entry StickySpatial(1) destination set predictor. Many papers have examined or exploited other forms of coherence prediction (e.g. dynamic self invalidation [20, 21]) Coherence predictors have been indexed with addresses [27] program counters [16] message history [19] and other state [17] Researchers have also developed protocols that optimize for specific sharing behaviors [6] read modify write sequences [28, 29] and migratory sharing [8, 33] Other ....

A.-C. Lai and B. Falsafi. Selective, Accurate, and Timely Self-Invalidation Using Last-Touch Prediction. In Proceedings of the 27th Annual International Symposium on Computer Architecture, pages 139--148, June 2000.

....same replacement decision should be applied The second question depends on the first, as the particular representation of a replacement decision will determine the set of points at which that decision should be applied. We address both these facets using techniques based on last touch prediction [10]. We record OPT behavior by identifying the final reference to each cache block before OPT would have replaced the block from the cache (i.e. the OPT last touch reference) We then collect signatures (e.g. program counter and or address information) for these OPT last touch references, which ....

....OPT last touch references. Most significantly, signatures can effectively distinguish OPT last touches from references that are last touches under LRU but are not last touches under OPT. Separation of these two reference types is crucial to providing improvement over LRU replacement. Previous work [10, 11] indicated only that LRU last touches could be distinguished from LRU non last touch references. Second, we propose a variety of signatures and investigate their effectiveness in correlating OPT last touch references across a range of cache configurations. As in earlier work [10, 11] we find ....

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An-Chow Lai and Babak Falsafi. Selective, accurate, and timely self-invalidation using last-touch prediction. In Proceedings of the 27th Annual International Symposium on Computer Architecture, pages 139--148, June 2000.

....coverage (i.e. cor rect predictions as a fraction of all misses) 5] This paper proposes the Dead Block Predictors (DBPs) and the Dead Block Correlating Prefetchers (DBCPs) A DBP is a novel hardware mechanism that predicts when a block in a data cache becomes evictable. In a recent paper [7], we proposed trace based predictors that record a trace of shared memory references to predict a last reference to a cache block prior to an invalidation in a multiprocessor. Similarly, a DBP records a trace of memory references that accurately predict the last reference to a block in an L1 data ....

....becomes dead and what cache block the processor will reference next, an DBCP can eliminate the miss and improve performance. A DBCP uses a two level predictor to predict both a cache block replacement and a subsequent address to prefetch for the corresponding block frame. In a recent paper [7], we proposed Last Touch Predictors (LTPs) to predict memory invalidations for shared data in a multiprocessor. In this paper, we derive predictors from LTPs that predict the last reference to a cache block prior to its eviction (i.e. when the block dies ) in the L1 cache and correlate a ....

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An-Chow Lai and Babak Falsafi. Selective, accurate, and timely self-invalidation using last-touch prediction. In Proceedings of the 27th Annual International Symposium on Computer Architecture, June 2000.

....consistency protocol performance by purging stale info from cache (eager writebacks) Particularly in directory based protocols, this can allow the system to save on stale invalidate traffic. From this aspect cache decay can be considered a poor man s predictor for dynamic self invalidation [21, 20]. Invalidations arriving from other processors can also be exploited by cache decay methods. In particular, these invalidations can be used as an additional hint on when to turn off cache lines. Victim Caches, Line Buffers and Stream Buffers: We also note that our cache decay schemes are ....

A.-C. Lai and B. Falsafi. Selective, Accurate, and Timely SelfInvalidation Using Last-Touch Prediction. In Proc. ISCA-27, May 2000.

....technique to hide latency and improve performance in computer systems. Computer architects are exploiting predictive techniques in a variety of tasks such as branch prediction [28,29] value prediction [19] cache way prediction [7] memory address [13,1] dependence [21] and sharing prediction [17,16]. In all cases, these hardware predictors capitalize on repetitive application behavior resulting in predictability in system event outcomes. By 2 predicting such outcomes and thereby hiding the long latency of the corresponding system events, hardware predictors improve performance. For ....

An-Chow Lai and Babak Falsafi. Selective, accurate, and timely self-invalidation using last-touch prediction. In Proceedings of the 27th Annual International Symposium on Computer Architecture, June 2000.

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An-Chow Lai and Babak Falsafi. Selective, accurate, and timely self-invalidation using lasttouch prediction. In ISCA '00: Proceedings of the 27th annual international symposium on Computer architecture, pages 139--148, New York, NY, USA, 2000. ACM Press.

No context found.

A.-C. Lai and B. Falsafi. Selective, accurate, and timely self-invalidation using last-touch prediction. In Architecture, pages 139--148, June 2000.

No context found.

A.-C. Lai and B. Falsafi. Selective, accurate, and timely selfinvalidation using last-touch prediction. In Proceedings of the 27th Annual International Symposium on Computer Architecture, June 2000.

No context found.

An-Chow Lai and Babak Falsafi. Selective, accurate, and timely self-invalidation using last-touch prediction. In Proceedings of the 27th Annual International Symposium on Computer Architecture, June 2000.

No context found.

A.-C. Lai and B. Falsafi. Selective, Accurate, and Timely Self-Invalidation Using Last-Touch Prediction. In Proc. of ISCA-27, pages 139--148, June 2000.

No context found.

A.C. Lai and Babak Falsa . Selective, Accurate, and Timely self-invalidation Using Last-Touch Prediction. In Proceedings of the Annual International Symposium on Computer Architecture, June 2000.

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