N. Kimura, J. Tsujimoto, "Calculation of Total Dynamic Current of VLSI Using a Switch Level Timing Simulator (RSIM-FX)", CICC, 1991.  Home/Search   Document Not in Database   Summary   Related Articles

....to Optimize Power 5 of 27 will be in the ZERO state, and C i is the physical capacitance associated with node i. The total power is then estimated as C avg V dd 2 f clk An approach for estimating the power consumption in CMOS circuits using a switch level simulator is presented in [16]. The basic idea is to monitor the number of times each node in the circuit transitions during the simulation period. C avg is given by N i N C i , where N i is the total number of power consuming transitions for node i, N is the number of simulation cycles, and C i is the physical capacitance ....

N. Kimura, J. Tsujimoto, "Calculation of Total Dynamic Current of VLSI Using a Switch Level Timing Simulator (RSIM-FX)", CICC, 1991.

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