M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits," Proceedings IEEE International Conference on Computer Aided Design, pp. 534-537, November 1987.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....(2) probabilistic techniques; and (3) statistical techniques. Typically, in a simulation based technique [2, 3, 4] the average power is calculated by monitoring either the supply voltage or current waveforms or both. These are too slow to handle very large circuits. In a probabilistic technique [5, 6, 7], user supplied input signal probabilities are propagated into the circuit. Various approaches based on different probabilistic measures such as transition density [8] are proposed. In a statistical technique [9, 10] the circuit is simulated with randomly generated input vectors until power ....

M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits", Proc. ICCAD, pp. 534-537, November 1987.

....is the clock frequency. As a matter of fact, the terms (a) and (b) depend, in an almost complex way, on the kind of gate input and output activity, including an important contribution due to glitches [15] Nevertheless, it is important to notice that several simulation based (at either the logic [16, 17, 18] or the electrical level [19] or pattern independent (probabilistic [20, 21] or symbolic [22] techniques can be used to evaluate P gate and, therefore, P active once the kind of input activityatC is known. Since the only differences between the standard and the proposed implementation is due to ....

M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits," Proc. of IEEE Int. Conf. On Computer Aided Design, pp. 534 -- 537, 1987.

....structure. Correlations between internat lines due to reconvergence are ignored during propagation. It is possible to take into account correlations by lureping all the modules into one large module, but in this case the information regarding the delay of the individual modules is lost. Cirit in [8] gives methods to calculate dynamic power dissipation based on approximate signal probability evaluation procedures. Our work improves upon the state of the art in several ways. We use a general delay model for combinational logic in our symbolic simulation method, which correctly computes the ....

M. A. Cirit. Estimating Dynamic Power Con- sumption of CMOS Circuits. In Proceedings of the Int'l Conference on Computer-Aided Design, pages 534-537, November 1987.

....large circuits, the estimation is strongly dependent on the set of input vectors. In probabilistic techniques, user supplied input signal probabilities are propagated into the circuit. To achieve this, special models for the components have to be developed and stored in the module library. Cirit [26] first proposed an power estimation based on the probabilities. Based on this, probabilistic simulation [50] 52] was proposed which accepts the specification of probability waveforms. It was further enhanced for more accuracy by Stamoulis et al. 10 [53]and Tsui et al. 54] Other probabilistic ....

M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits", Proc. ICCAD, pp. 534-537, November 1987.

....power estimators completely ignore the shortcircuit current and focus on the dynamic transition current, which is well recognized as the most dominating factor of power dissipation in a CMOS circuit. Dynamic transition power is strongly related to the transition density of each internal signal [1]. Several methods [5,6,7,8,9,10,11,12,13] have been proposed to estimate the transition density of each internal signal at the logic level. However, these logic level approaches suffer from the drawback of inaccuracy. This work was supported by the National Science Foundation under grant ....

.... is the difference between the desired transition density and the transition density with respect to S current , i.e. P d f V dd 2 i T i C i ( F V ( T V i , C i ( i = T mmt (g) T(V original , g) T(S current , g) o The value of a signal s transition momentum is within [ 1, 1]. If a signal has a positive transition momentum, then its desired transition density is higher than the transition density established by S current . In other words, it is under transitioned so far and the vectors generated in the following iterations should increase its transition activity. On ....

[Article contains additional citation context not shown here]

M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits," Proceedings of ICCAD, pp. 534-537, Nov. 1987.

....redesign steps of the system because high power consumption can shorten the battery life and, even worse, may lower the reliability of the system. Gate level power estimation techniques are divided into two categories [1] probabilistic and statistical techniques. In probabilistic techniques [2, 3], the average switching rates (called transition densities) of the primary inputs are propagated upstream to the primary outputs of a circuit using some gate level transfer functions. Probabilistic techniques are usually fast in computing the power dissipation, but their accuracy may not be ....

M. A. Cirit, "Estimating dynamic power consumption of CMOS circuits.", IEEE ICCAD, pp.534-537, Nov. 9-12, 1987.

....(2) probabilistic techniques; and (3) statistical techniques. Typically, in a simulation based technique [23, 25, 28] the average power is calculated by monitoring either the supply voltage or current waveforms or both. These are too slow to handle very large circuits. In a probabilistic technique [34, 18, 36], user supplied input signal probabilities are propagated into the circuit. Various approaches based on different probabilistic measures such as transition density [16] are proposed. In a statistical technique [2, 3] the circuit is simulated with randomly generated input vectors until power 2 ....

M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits", Proc. ICCAD, pp. 534537, November 1987.

....if we estimate the switching activity of all nodes in the circuit, we can indirectly measure power consumption of the circuit. Many studies in power estimation for switch level and gate level circuits assume that the average power dissipation is proportional to average switching activity [5, 6, 7]. On an average, for all examples considered, the estimates of the switching activity is within 10 of the actual switching activity measured at switch level of the design extracted from layout. II. Previous Work The power estimation techniques at gate level and lower levels of abstraction can ....

....waveform. Although these are efficient in handling very large circuits, they are strongly input pattern dependent. In probabilistic techniques , user supplied input signal probabilities are propagated into the circuit. by developing special models for the components in the module library. Cirit [7] first proposed an power estimation based on the probabilities. Probabilistic simulation [14] 16] which accepts the specification of probability waveforms. It was further enhanced for more accuracy by Stamoulis et al. 17]and Tsui et al. 6] Other probabilistic approaches based on transition ....

M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits", Proc. ICCAD, pp. 534-537, November 1987.

....then every input signal line acquires a certain probability of being high (or low) Internal circuit node probabilities can be derived from the input probabilities given the connectivity of the circuit. This concept has recently been used to estimate the power consumption of CMOS circuits [10]. The power consumption is closely related to the timeaverage of the current which, as pointed out above, is different from our E[i(t) If P ih is the probability that node i is high, then the probability of a transition at i is taken to be P ih Theta (1 Gamma P ih ) in [10] This assumes that ....

.... of CMOS circuits [10] The power consumption is closely related to the timeaverage of the current which, as pointed out above, is different from our E[i(t) If P ih is the probability that node i is high, then the probability of a transition at i is taken to be P ih Theta (1 Gamma P ih ) in [10]. This assumes that the signal probability at i before a transition is the same as after, and that the two signal values are independent random variables. In this work we make no such assumptions, we extend the signal probabilities concept to include transition probabilities. The transition ....

[Article contains additional citation context not shown here]

M. A. Cirit, "Estimating dynamic power consumption of CMOS circuits," IEEE International Conference on Computer Aided Design, November 1987.

....we will discuss the details of the concepts above outlined, and we will give some background material needed to understand the algorithms that follow. 2. 1 A model for power dissipation At the gate level of abstraction, a circuit s power consumption is proportional to its switching activity [11]. We define the average switching activity at the output of a gate i in a time period T as the average number of signal transitions: n i (T ) n trans =T . We define the transition probability (switching probability) as p i = lim T 1n i (T ) namely, the limit value of the switching activity as ....

M. A. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In Proc. of IEEE Int. Conf. On Computer Aided Design, pages 534 -- 537, November 1987.

....of this experience, the focus of our research in low power logic synthesis is the technology mapping stage where, we believe, it is possible to have reasonable power models for gates in the library. A related topic, which has also been the focus of considerable research in the recent past [11, 18, 15, 7, 16], is one of accurately and efficiently measuring the power dissipated in a circuit. The first issue we examine in this paper is that of modeling the power requirements of gates. Traditionally the active area of gates has been considered to be proportional to the power. Given the fact that in CMOS, ....

M. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In Proceedings of the International Conference on Computer-Aided Design, pages 534--537, November 1987.

....typical input behavior. Thus, their accuracy is limited by the quality of the delay models and of the input specification. Throughout the discussion below, primary inputs and primary outputs will refer to inputs and outputs of the combinational circuit block. 3.2.2.1. Using signal probability In [19], a zero delay model is used and temporal as well as spatial independence is assumed. The user is expected to provide signal probabilities at the primary inputs. These are then propagated into the circuit to provide the probabilities at every node. In the paper, the propagation of probabilities is ....

M. A. Cirit, "Estimating dynamic power consumption of CMOS circuits," IEEE International Conference on Computer-Aided Design, pp. 534-537, Nov. 1987.

....unwilling to sacrifice the system throughput. 1.1 Prior Work Power analysis tools are required to enable the designers accurately and quickly estimate the power consumption of various design alternatives. Several researchers have studied the problem of estimating power consumption. Cirit [4] estimates the dynamic power consumption at the transistor level based on the probability of the drain of a transistor making a power consuming transition. Burch et al. 3] introduce the concept of probability waveforms. Given such waveforms at the primary inputs and with some convenient ....

M. A. Cirit. Estimating dynamic power consumption of CMOS circuits. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 534--537, November 1987.

....CMOS circuits embedded in a synchronous design environment, as described above. For the rest of this section, therefore, we will be concerned with the power consumed in a combinational circuit whose inputs switch in synchrony. The use of probabilities to estimate power was first proposed in [19]. In this work, a zero delay model was assumed and a temporal independence assumption was made so that the transition probabilities could be estimated using signal probabilities based on (2) Signal probabilities supplied by the user at the primary inputs are propagated into the circuit assuming ....

....about typical input behavior. Thus, their accuracy is limited by the quality of the delay models and the input specification. Nevertheless, some are more accurate than others, and this may be gauged by looking at criteria (1) 2) and (5) in the table. 4.1. Using signal probability In [19], a zero delay model is used and temporal as well as spatial independence is assumed. The user is expected to provide signal probabilities at the primary inputs. These are then propagated into the circuit to provide the probabilities at every node. In the paper, the propagation of probabilities is ....

M. A. Cirit, "Estimating dynamic power consumption of CMOS circuits," IEEE International Conference on Computer-Aided Design, pp. 534-537, Nov. 9-12, 1987.

....The earliest method of signal probability evaluation is the ParkerMcCluskey method [10] upon which our method is based. Various other methods to approximate signal probability for testability applications have been proposed. The use of probabilities to estimate power was first proposed by Cirit [3]. In this work, both signal spatial and temporal correlation are ignored. The transition density work of Najm [8] introduces temporal correlation, but still ignores correlation between internal signals. Improvements to the basic strategy [4] model some internal correlation, but do not serve as a ....

M. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In Proceedings of the International Conference on Computer-Aided Design, pages 534--537, November 1987.

....which are applicable for a wide range of technologies. Prior Work Early research in the physical design area focussed on the problem of estimating power consumption, since an exhaustive simulation of possible input sequences is impractical for all but the smallest circuits. Cirit [1] tackled the problem at the transistor level through the estimation of inner controllabilities, while Najm [6] introduced a measure of switching activity called transition density. Ghosh et.al. 2] proposed a symbolic simulation approach to compute the Boolean conditions for the switching at each ....

Mehmet A. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In Proceedings of the 5th International Conference on Computer-Aided Design, pages 534--537, November 1987.

....circuits, embedded in a synchronous design environment, as described above. For the rest of this section, therefore, we will be concerned with the power consumed in a combinational circuit whose inputs switch in synchrony, if at all. The use of probabilities to estimate power was first proposed in [19]. In this work, a zero delay model was assumed and a temporal independence assumption was made so that the transition probabilities could be estimated using signal probabilities based on (2) Signal probabilities supplied by the user at the primary inputs are propagated into the circuit assuming ....

....about typical input behavior. Thus, their accuracy is limited by the quality of the delay models and the input specification. Nevertheless, some are more accurate than others, and this may be gauged by looking at criteria (1) 2) and (5) in the table. 4.1. Using signal probability In [19], a zero delay model is used and temporal as well as spatial independence is assumed. The user is expected to provide signal probabilities at the primary inputs. These are then propagated into the circuit to provide the probabilities at every node. In the paper, the propagation of probabilities is ....

M. A. Cirit, "Estimating dynamic power consumption of CMOS circuits," IEEE International Conference on Computer-Aided Design, pp. 534-537, Nov. 9-12, 1987.

....processor design using self clocking, static and dynamic power management strategies, etc. The computer aided design community has recently started paying more attention to power estimation and low power design. Several researchers have studied the problem of estimating power consumption. Cirit [6] estimates the dynamic power consumption at the transistor level based on the probability of the drain of a transistor making a power consuming transition. Burch et al. 4] introduce the concept of probability waveforms. Given such waveforms at the primary inputs and with some convenient ....

M. A. Cirit. Estimating dynamic power consumption of CMOS circuits. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 534--537, November 1987.

No context found.

M. A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits," Proceedings IEEE International Conference on Computer Aided Design, pp. 534-537, November 1987.

No context found.

M. A. Cirit. Estimating dynamic power consumption of CMOS circuits. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 534--537, November 1987.

No context found.

M. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In Proceedings of the International Conference on Computer-Aided Design, pages 534--537, November 1987.

No context found.

M. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In pages 534--537, November 1987.

No context found.

M.A. Cirit. Estimating dynamic power consumption of CMOS circuits. In IEEE International Conference on Computer-Aided Design, pages 534--537, 1987.

No context found.

Mehmet A. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In Proceedings of the 5th International Conference on Computer-Aided Design, pages 534--537, November 1987.

No context found.

M. A. Cirit. Estimating Dynamic Power Consumption of CMOS Circuits. In Proc. of lEEE Int. Conf On Computer AidedDesign, pages 534 537, November 1987.

First 50 documents

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC