M.N. Velev, and R.E. Bryant, "Incorporating Timing Constraints in the Efficient Memory Model for Symbolic Ternary Simulation," 2 International Conference on Computer Design (ICCD `98), October 1998, pp. 400-406. Home/Search Document Details and Download
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Formal Verification of Superscalar Microprocessors with.. - Velev, al. (2000) (11 citations) (Correct)
....is true) or previously (DoneButStalled is true) Otherwise, the output of the place holder will get a new domain variable produced by the generator of arbitrary values at its output ND Result. The effect is analogous to using Xs is symbolic ternary simulation in order to express ambiguity [32]. Therefore, the place holder on Fig. 3 is a conservative approximation of a multicycle functional unit of arbitrary latency. The same functional unit is modeled in the Specification processor by UF ALU only, but not the extra logic required to implement the place holder, as the Specification ....
M.N. Velev, and R.E. Bryant, "Incorporating Timing Constraints in the Efficient Memory Model for Symbolic Ternary Simulation," 2 International Conference on Computer Design (ICCD `98), October 1998, pp. 400-406.
Formal Verification of Superscalar Microprocessors with.. - Velev, Bryant (2000) (11 citations) Self-citation (Velev Bryant) (Correct)
....is true) or previously (DoneButStalled is true) Otherwise, the output of the place holder will get a new domain variable produced by the generator of arbitrary values at its output ND Result. The effect is analogous to using Xs is symbolic ternary simulation in order to express ambiguity [19]. Therefore, the place holder on Fig. 2 is a conservative approximation of a multicycle functional unit of arbitrary latency. The same functional unit is modeled in the Specification processor by UF ALU only, but not the extra logic required to implement the place holder, as the Specification ....
M.N. Velev, and R.E. Bryant, "Incorporating Timing Constraints in the Efficient Memory Model for Symbolic Ternary Simulation," 2 International Conference on Computer Design (ICCD `98), October 1998, pp. 400-406.
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