Virtual Socket Interface Association, On-Chip Bus Development Working Group, Specification I Version 1.0 (OCB I 1.0), http://www.vsi.org, 1998. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Pre-fetching for Improved Core Interfacing - Lysecky, Vahid, Givargis, Patel (1999) (2 citations) (Correct)
....ability to be easily integrated across a wide variety of buses. Unfortunately, standardizing on one or two on chip buses does not appear to be possible, because of the diversity of constraints present in embedded systems, as recognized for example by the Virtual Socket Interface Alliance (VSIA) [4]. Thus, to achieve such ease of integration, many have proposed designing cores with their interface behavior kept separate from their internal behavior [4] 5] 6] This is especially true for peripheral cores, for which portability is a key issue. Such separation isolates any bus specific changes ....
.... because of the diversity of constraints present in embedded systems, as recognized for example by the Virtual Socket Interface Alliance (VSIA) 4] Thus, to achieve such ease of integration, many have proposed designing cores with their interface behavior kept separate from their internal behavior [4][5] 6] This is especially true for peripheral cores, for which portability is a key issue. Such separation isolates any bus specific changes to a small region of the core, which we will call an interface module (IM) However, such modularity often comes with a performance penalty. For example, ....
Virtual Socket Interface Association, On-Chip Bus Development Working Group, Specification 1 Version 1.0 (OCB 1 1.0), http://www.vsi.org, 1998.
Experiments with the Peripheral Virtual Component Interface - Lysecky, Vahid, Givargis (Correct)
.... (SOC) Unfortunately, standardizing on one or two on chip SOC buses, which certainly would ease integration, does not appear to be possible because of the diversity of constraints present in embedded systems, as recognized for example by the Virtual Socket Interface Alliance (VSIA) [4]. Thus, to achieve such ease of integration, many have proposed designing cores with their interface behavior implemented in a bus wrapper, separated from the core s internal behavior [4] 5] 6] This separation means that changes necessary to adapt a core to a particular bus are limited to the bus ....
.... present in embedded systems, as recognized for example by the Virtual Socket Interface Alliance (VSIA) 4] Thus, to achieve such ease of integration, many have proposed designing cores with their interface behavior implemented in a bus wrapper, separated from the core s internal behavior [4][5] 6] This separation means that changes necessary to adapt a core to a particular bus are limited to the bus wrapper. In this paper, we analyze the impact of using a bus wrapper on the design metrics of performance, power and size. Furthermore, we analyze the impact on those metrics of using ....
Virtual Socket Interface Association, On-Chip Bus Development Working Group, Specification 1 Version 1.0 (OCB 1 1.0), http://www.vsi.org, 1998.
Techniques for Reducing Read Latency of Core Bus Wrappers - Lysecky, Vahid, Givargis (2000) (3 citations) (Correct)
....has led to the marketability of Intellectual Property (IP) cores, available in various forms ranging from soft cores to hard cores (e.g. 4] The ability to easily integrate a core into a system can increase a core s usefulness. Early efforts by the Virtual Socket Interface Alliance (VSIA) [12] focused on defining a standard on chip bus, but this was soon viewed to be infeasible. Instead, they are now defining a standard that prescribes creating cores with internal behavior separated from the bus interface logic through a bus wrapper. Other researchers have also proposed such separation ....
Virtual Socket Interface Association, On-Chip Bus Development Working Group, Specification 1 Version 1.0 (OCB 1 1.0), http://www.vsi.org, 1998.
Experiments with the Peripheral Virtual Component Interface - Lysecky, Vahid, Givargis Self-citation (Interface) (Correct)
.... (SOC) Unfortunately, standardizing on one or two on chip SOC buses, which certainly would ease integration, does not appear to be possible because of the diversity of constraints present in embedded systems, as recognized for example by the Virtual Socket Interface Alliance (VSIA) 4] Thus, to achieve such ease of integration, many have proposed designing cores with their interface behavior implemented in a bus wrapper, separated from the core s internal behavior [4] 5] 6] This separation means that changes necessary to adapt a core to a particular bus are limited to the ....
.... present in embedded systems, as recognized for example by the Virtual Socket Interface Alliance (VSIA) 4] Thus, to achieve such ease of integration, many have proposed designing cores with their interface behavior implemented in a bus wrapper, separated from the core s internal behavior [4] 5] 6] This separation means that changes necessary to adapt a core to a particular bus are limited to the bus wrapper. In this paper, we analyze the impact of using a bus wrapper on the design metrics of performance, power and size. Furthermore, we analyze the impact on those metrics of using ....
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Virtual Socket Interface Association, On-Chip Bus Development Working Group, Specification I Version 1.0 (OCB I 1.0), http://www.vsi.org, 1998.
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