T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, Santa Margherita, Italy, June 1995.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....that offer benefits within a constant factor of an optimal offline (i.e. oracle based) algorithm. A body of computer systems work has previously successfully applied such strategies to problems including superpage promotion for TLB performance, prefetching and multiprocessor synchronization [41, 61]. A generic policy for competitive algorithms is to take action at a point in time where the extra cost we have incurred so far by waiting is precisely equal to the extra cost we might incur if we act but guess wrong. Such a policy, it has been shown, leads to worst case cost that is within a ....

....waiting is precisely equal to the extra cost we might incur if we act but guess wrong. Such a policy, it has been shown, leads to worst case cost that is within a factor of two of the offline optimal algorithm. For example, in the case of our cache decay policy we are trying to determine when [61] includes a helpful example: the ski rent vs. buy problem. For example, if ski rental charges are 40 per day, and skis cost 400 to buy, then online approaches suggest that a beginning skier (who doesn t know whether they will enjoy skiing or not) would be wise to rent skis 10 times before ....

T. Romer, W. Ohlrich, A. Karlin, and B. Bershad. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995.

....a single larger mapping entry. The reason that superpages have not been used more extensively is that they have a few requirements that make them either difficult or unattractive to use. There have been several proposals to tackle some of the drawbacks of superpages. Online superpage promotion [10] Increased hardware resource benefits flatten out once typical working sets can be fully mapped in the TLB. tries to dynamically predict the likely benefits of promoting to a superpage against the cost of doing the promotion to determine when and where to use superpages. A technique called ....

Theodore H. Romer, Wayne H. Ohllrich, Anna R. Karlin, and Brian N. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proceedings of the 22nd International Symposium on Computer Architecture (ISCA), pages 176--87, Santa Margherita Ligure, Itay, June 1995. ACM. 10

....should be necessary and the system should run in commodity machines. Furthermore, in the absence of memory contention, the system should be able with essentially zero overhead to minimize the e ect of capacity TLB misses. Finally, the cost of each TLB should not increased. 1 Many researchers [3, 8, 4, 2] suggest that the miss penalty will be larger when supporting superpages, but there is no reason for that: HP UX is a counterexample. Although it provides non adaptive support, adaptability can be obtained without modifying the TLB miss path if promotion decisions are made elsewhere. 2.1 Promotion ....

....that are aligned to a superpage boundary, in order to maximize promotion opportunities. Large or growable segments should be aligned to the largest supported superpage; other segments should be aligned to the larger superpage that is smaller than the segment. 3 Related work Romer et al. [4] propose a competitive algorithm that uses online cost bene t analysis to determine when the overhead of promotion through gathering can be outweighed by the bene ts of fewer TLB misses. This approach requires counters associated to each potential superpage, which are updated at TLB miss time. ....

T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. of the 22nd Annual International Symposium on Computer Architecture, pages 176-187, Santa Margherita, Italy, 1995.

....no misses in the second level cache) Since we simulate a software DSM, neither cache has coherence misses. Table 3 shows application speedups with a fixed cost of 2 cycles per memory access, and with a variable cost where 6 cycles are charged for each cache miss and 30 cycles for each TLB miss [23]. We evaluated speedups for one and four threads for the slow and fast networks, with and without interrupts. The polling scheme polls only at messages sends. Overall speedups for the cache runs are just slightly higher than for the fixed cost runs discussed below. Cache speedups are generally ....

T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. N. Bershad, "Reducing TLB and Memory Overhead Using Online Superpage Promotion.," in Proceedings of the 22 nd Annual International Symposium on Computer Architecture, 1995.

.... Trading off purge costs against increased misses. ffl Optimizing the idle task Chapter 2 Related Work There has been surprisingly little published experimental work on OS memory management design. Two works that had a great deal of influence on our work were a series of papers by Bershad [19] advocating the use of superpages to reduce TLB contention and a paper by Liedtke [14] on performance issues in the development of the L4 kernel. Our initial belief was that TLB contention would be a critical area for optimization and that the monolithic nature of the Linux kernel would allow ....

....do require that the hardware support variable page sizes. There is extensive literature on the proposal to use superpages mapped extents that are much larger than common current page sizes as a solution. Proposals for architectural support range from the straightforward simple schemes [19] to suggestions by Swanson [23] for an additional level of indirection in page translation to create non contiguous and unaligned superpages. This scheme makes superpage use far more convenient since the memory management system does not have to be designed around it (finding large, contiguous, ....

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Theodore Romer, Wayne Ohlrich, Anna Karlin, and Brian Bershad. Reducing tlb and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995.

....We begin with a time based strategy, which we call cache decay, that turns a cache line off if a pre set number of cycles have elapsed since its last access. This time based strategy has the nice property that its worst case energy behavior can be bounded using theories from competitive algorithms [17, 25]. It results in roughly 70 reduction in L1 data cache leakage energy. We also study adaptive variants of this approach, which seek to improve average case performance by adaptively varying the decay interval as the program runs. These adaptive approaches use an adaptation policy that approximates ....

....that offer benefits within a constant factor of an optimal offline (i.e. oracle based) algorithm. A body of computer systems work has previously successfully applied such strategies to problems including superpage promotion for TLB performance, prefetching and multiprocessor synchronization [17] [25]. A generic policy for competitive algorithms is to take action at a point in time where the extra cost we have incurred so far by waiting is precisely equal to the extra cost we might incur if we act but guess wrong. Such a policy, it has been shown, leads to worst case cost that is within a ....

[Article contains additional citation context not shown here]

T. Romer, W. Ohlrich, A. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. ISCA-22, 1995.

....(due to the new decision making code in the miss handler) and the increased contention in the cache hierarchy (due to the code and data used in the promotion process) When deciding whether to create superpages, all costs must be balanced against the improvements in TLB performance. Romer et al. [40] study several different policies for dynamically creating superpages. Their trace driven simulations and analysis show how a policy that balances potential performance benefits and promotion overheads can improve performance in some TLB bound applications by about 50 . Our work extends that of ....

....vector outweighs the benefit of saving the computation of voxel offsets and slows down execution. 4. 2 Online Superpage Promotion To evaluate the performance of Impulse s support for inexpensive superpage promotion, we reevaluated Romer et al. s work on dynamic superpage promotion algorithms [40] in the context of Impulse. Our system model differs from theirs in several significant ways. They employ a form of trace driven simulation with ATOM [42] a binary rewriting tool. That is, they rewrite their applications using ATOM to monitor memory references, and the modified applications are ....

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T. Romer, W. Ohlrich, A. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 176--187, June 1995.

....we do not focus on TLB issues in this paper. One justification for this approach is the fact that almost all modern TLBs are capable of using superpages [14] essentially allowing single TLB entries to point to much larger regions. While posing difficulties for operating system implementors [27], this facility may effectively remove the TLB miss issue for main memory databases by allowing the entire database to effectively share one or two TLB entries. While we do not focus on TLB effects, they were apparent during our experimentation in the form of better performance when index nodes ....

T. Romer, W. Ohlrich, A. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 176--187, 1995.

....on techniques for improving program execution time, focusing on replacement algorithms. Recent studies examined page coloring policies for selecting appropriate physical page frames to minimize cache misses [2, 23] Other recent work has studied page placement aimed at improving TLB performance [41] or NUMAmultiprocessor memory access [27, 28, 45, 12, 3] Each of these problems bears some resemblance to the issues we face since they all attempt to exploit the flexibility available in mapping virtual to physical pages. 3. HARDWARE POWER MANAGEMENT This section explains various hardware ....

T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. N. Bershad. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 22nd International Symposium on Computer Architecture, pages 176--187, June 1995.

....(due to the new decision making code in the miss handler) and the increased contention in the cache hierarchy (due to the code and data used in the promotion process) When deciding whether to create superpages, all costs must be balanced against the improvements in TLB performance. Romer et al. [24] study several different policies for dynamically creating superpages. Their trace driven simulations and analysis show how a policy that balances potential performance benefits and promotion overheads can improve performance in some TLBbound applications by about 50 . However, at least two ....

....and gives the results of our study. Section 5 summarizes our conclusions and discusses future work. 2 Related Work Competitive algorithms perform online cost benefit analyses to make decisions that guarantee performance within a constant factor of an optimal offline algorithm. Romer et al. [24] adapt this approach to TLB management, and employ a competitive strategy to decide when to perform dynamic superpage promotion. They also investigate online software policies for dynamically remapping pages to improve cache performance [3, 23] Competitive algorithms have been used to help ....

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T. Romer, W. Ohlrich, A. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. of the 22nd ISCA, pp. 176--187, June 1995.

....limiting nature, memory operations that involve the processor demand careful attention. Memory block moves involve moving blocks of data from one location in physical memory to another and are important for many applications. 1. Superpages: Grouping base pages together into superpages [2] [3] 4] 5] improves the Translation Lookaside Buffer (TLB) performance by increasing the coverage of the TLB without increasing the number of TLB entries. Creating a superpage requires that the constituent base pages be contiguous both in virtual as well as in physical address spaces. If the ....

....sparsely populated superpages, they proposed subpage valid bits in each TLB entry which allowed holes in the superpage where base pages are either not resident or not in a contiguous, aligned region of memory. Romer et al. at Washington have proposed an online policy for superpage management[2] that enables greater TLB coverage and is much more flexible. Their scheme works as follows. When two virtually contiguous pages cause frequent TLB misses, they can be promoted to form a superpage. If the component pages of such a candidate superpage are not physically contiguous, then one or more ....

Theodore H. Romer, Wayne H. Ohlrich, Anna R. Karlin, and Brian N. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 176--187, June 1995.

....in recent studies, miss handling is not unknown to contribute 40 of application runtime [HH93] Various methods have been proposed to combat increasing TLB miss ratios. Associativity trade offs and changes [NUS 93, CLK97] micro TLBs [CBJ92] variable page sizes [CBJ92, TKHP92, KTNW93, ROKB95] and subblocking [Tal95] have been examined and incremental improvements made in effective TLB coverage. TLBs have been removed altogether in some experimental systems [WEG 86, CSD86, JM97] which perform address translation in the cache; however, the tech CHAPTER 4. GUARDED PAGE TABLE ....

Theodore H. Romer, Wayne H. Ohlrich, Anna R. Karlin, and Brian N. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. 22nd International Symposium on Computer Architecture, Santa Margherita Ligure, Italy, 1995. ACM.

....resulting in higher miss cycle times [16] is motivated by greater flexibility for operating systems design and porting. Clark and Emer [5] reported TLB miss handling times in a VAX 11 780 as contributing between 5 to 8 to the runtime of a user program. A more recent study by Romer et al. [17] using a DEC Alpha 3000 700 have found that TLB miss handling times have risen to between 5 and 41 of the runtime of a user program. Deceasing TLB efficiency indicates the increased impact of TLB performance on the overall performance of the computer system. Architectural changes such a ....

T H Romer, W H Ohlrich, A R Karlin and B N Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. 22nd ISCA, 1995.

....from page tables. The time spent by the processor in servicing a TLB miss is called the TLB miss handling time. In 1985, Clark and Emer [6] reported TLB miss handling times in a VAX 11 780 as contributing between 5 to 8 to the runtime of a user program. A more recent study by Romer et al. [11] using a DEC Alpha 3000 700 have found that TLB miss handling times have risen to between 5 and 41 of the runtime of a user program. Such findings indicate the increased impact of TLB performance on the overall performance of a computer system. This suggests that we rethink current approaches ....

....for the construction of a larger TLB effectively reduces TLB misses. Alternatively, increasing the amount of memory mapped by each entry in the TLB by increasing the base page size or through the use of TLBs with multiple page size support has gained a lot of attention in recent TLB studies [7, 17, 11]. Large single base page size selection considers fragmentation, paging latency issues and page protection granularity. Alternatively, the multiple page size principle is to map frequently used smaller blocks as a single larger page. Thus, the coverage of some entries in the TLB can be increased ....

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T H Romer, W H Ohlrich, A R Karlin and B N Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. 22nd ISCA, 1995.

....at runtime access patterns, like gnuplot. SEQ s method of observing performance characteristics (in this case, page faults) at runtime is conceptually similar to methods explored by Romer et al. for improving other aspects of memory system performance, in particular page placement[35] and page size[36]. Finally, I observe that SEQ can clearly be applied to filesystem buffer cache management. Much evidence suggests that file access patterns are often sequential[4, 31] perhaps more sequential than virtual memory access patterns. Although this thesis has concentrated solely on virtual memory, ....

Theodore H. Romer, Wayne H. Ohrlich, Anna R. Karlin, and Brian N. Bershad. Reducing TLB and memory overhead using online superpage promotion. In 111 Proc. 22nd Annual International Symposium on Computer Architecture, pages 176--189, June 1995.

....(due to the new decision making code in the miss handler) and the increased contention in the cache hierarchy (due to the code and data used in the promotion process) When deciding whether to create superpages, these costs must be balanced against the improvement in TLB performance. Romer et al. [22] study several di erent policies for dynamically creating superpages. Their trace driven simulations and analysis show how a policy that balances potential performance bene ts and promotion overheads can improve performance in some TLB bound applications by about 50 . Our work extends theirs by ....

....and the results of our study. Section 6 summarizes our conclusions and discusses future work. 2 Related Work Competitive algorithms perform cost bene t analyses dynamically to make online decisions that guarantee performance within a constant factor of an optimal o ine algorithm. Romer et al. [22] adapt this approach to TLB management, employing a competitive strategy to decide when to perform dynamic superpage promotion. They also investigate online software policies for dynamically remapping pages to improve cache performance [3, 21] Competitive algorithms have been used to help ....

[Article contains additional citation context not shown here]

T. Romer, W. Ohlrich, A. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. of the 22nd ISCA, pp. 176-187, June 1995.

.... problems associated with general utilization of superpages are (i) the requirement that they be used only to map regions of physical memory that are appropriately sized, aligned, and contiguous[15] ii) the difficulty associated with determining for which regions they are suitable and economical[18], and (iii) the need for the OS to swap entire superpages on and off disk if paging is required. In this paper, we present a mechanism that addresses problems (i) and (iii) directly, and by changing the economics of using superpages, reduces the importance of problem (ii) The proposed mechanism ....

....this functionality, complete subblock TLBs must contain a complete set of physical page mappings for each superpage, which will severely limit the maximum superpage size for an onprocessor TLB. We move these mappings to the memory controller, where large tables can be stored easily. Romer et al.[18] address the problem of selecting regions that can effectively benefit from mapping via superpages. They propose a mechanism for dynamically promoting regions for mapping with superpages given the costs, especially copying, and potential benefits of the promotion. A similar mechanism would be ....

T. H. Romer, W. H. Ohrlich, A. R. Karlin, and B. Bershad. Reducing tlb and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 176--187, June 1995.

.... halted to handle an asynchronous interrupt (with precise exception handling) Most recent work in TLB performance enhancement has revolved around the use of superpages to increase the reach of a basic TLB with some very simple extensions of the basic design and significant operating system support [3, 7, 9, 10]. There are several drawbacks to this approach. Larger pages reduce efficiency because they increase internal fragmentation and makes the unit of protection and sharing more coarse grained. Attempts to remedy the situation using a combination of small pages and larger pages when possible have ....

....because they increase internal fragmentation and makes the unit of protection and sharing more coarse grained. Attempts to remedy the situation using a combination of small pages and larger pages when possible have shown that it is possible, but requires extensive operating system modifications [7, 9]. Page table pointer caches cache pointers to pages of page table entries rather than page table entries as a TLB does. On a TLB miss the PTPC is checked and in most cases, it can refill the TLB with a single single memory access to the page table (see Figure 1) PTPC misses are handled in ....

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T. Romer, W. Ohlrich, A. Karlin, and B. Bershad. Reducing tlb and memory overhead using online superpage promotion. In Proceedings of the 22th Annual International Symposium on Computer Architecture, pages 176--187, June 1995.

....entries. Trading off purge costs against increased misses. ffl Optimizing the idle task 2 Related Work There has been surprisingly little published experimental work on OS memory management design. Two works that had a great deal of influence on our work were a series of papers by Bershad [7] advocating the use of superpages to reduce TLB contention and a paper by Liedtke [3] on performance issues in the development of the L4 microkernel. Our initial belief was that TLB contention would be a critical area for optimization and that the monolithic nature of the Linux kernel would ....

....just invoke the handler. With interrupt overhead this high, TLB reloads will be expensive no matter how much we optimize the TLB reload code itself. With this motivation, we thought it worthwhile to reduce the frequency of TLB misses as much as possible. 5. 1 Reducing the OS TLB footprint Bershad [7] and others have argued on theoretical grounds that superpages and other mechanisms for reducing the OS TLB footprint can greatly improve performance. Indeed, we found that 33 of the TLB entries under Linux PPC were for kernel text, data and I O pages. The PowerPC 603 TLB has 128 entries and ....

Theodore Romer, Wayne, Ohlrich, Anna Karlin, and Brian Bershad. Reducing tlb and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995.

....pages and multi page transfers are needed to amortize the cost. Second, the combination of relatively small TLBs and large physical memories on current machines causes performance degradation due to insufficient TLB coverage. TLB coverage is increased by large page sizes or superpage mechanisms [73, 72, 58]; e.g. the DEC Alpha supports page sizes from 8KB to 1MB, the SUN UltraSPARC supports page sizes from 8KB to 4MB, and the MIPS R10000 supports page sizes from 4KB to 16MB. Unfortunately, the latency characteristics of high speed networks are at odds with this trend. Recent research has succeeded ....

Ted Romer, Wayne Ohlrich, Anna Karlin, and Brian Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. of the 22nd Annual Int. Symp. on Computer Architecture, June 1995.

....carried out by looping over the 4KB based constituent VM data structures. Our system offers significant application performance improvement when using large pagesizes. 1 Introduction Translation Lookaside Buffer (TLB) misses can degrade the performance of applications with large working set sizes [2, 4, 18, 21, 23]. A TLB is a cache of recently accessed virtual to physical page translation information. The working set of a process is the memory actively referenced during a certain time interval [6] A typical TLB that performs translations using small pagesizes such as 4KB, cannot hold all the translations ....

.... designed to represent a uniform pagesize such as 4KB, be redesigned or adapted to allow coexistence of multiple pagesizes How will the pagesize be chosen for a given mapping Should a large mapping be created at fault service time Or, should it be created at a later time through page promotion [18, 23] How should the interfaces across VM and filesystems be modified to deal with multiple pagesizes How should physical memory be managed such that a properly aligned page of any TLB supported pagesize may be allocated How should candidates for page replacement be selected To support multiple ....

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T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. N. Bershad. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture (ISCA), pages 176--187, June 1995.

....because the view of main memory as a fixed and contiguous physical address space is traditional. Address translation under TVM will proceed at page granularity, which has been found to incur a somewhat significant overhead for some applications (on uniprocessors) up to 50 of the execution time [105, 88]. This overhead corresponds to what is referred to as translation lookaside buffer (TLB) miss overhead. The TLB is a small and fast associative memory near the processor which caches the more recently used page mapping table entries, and is an essential component to achieve reasonable performance ....

....portion of physical address space is available. In contrast, handling pages all of the same size simplifies main memory management because any virtual page can be placed into any physical page. Another alternative to reduce TLB miss overhead is to use TLB support for variable size pages [105, 88]. Pages larger than the base size page are referred to as superpages, and can be up to tens, hundreds or a even a few thousand Mega bytes. The use of TLB support for superpages tends to reduce the TLB miss count and consequently TLB miss overhead. But it is optional because superpages are like ....

[Article contains additional citation context not shown here]

Theodore H. Romer, Wayne H. Ohlrich, Anna R. Karlin, and Brian N. Bershad. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 176--187, 1995.

.... Recent studies have shown that dynamically controlling the operating system s virtual to physical mapping policies using information about dynamic reference patterns can reduce conflict misses in large direct mapped caches [4, 15] lower TLB miss rates through the creation of superpages [16], and decrease the number of remote memory references in NUMAbased multiprocessors through replication and migration of pages [17] All of these schemes gather reference pattern information through either specialized hardware for gathering cache miss addresses or specialized software schemes ....

T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. N. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. 22nd Annual Intl. Symp. on Computer Architecture, pages 176--187, June 1995.

....limited to their NUMA systems. These machines are primarily used as batch like compute servers where applications are carefully sized to fit in memory so as to optimize performance. On such systems, paging is designed to be an infrequent event. for which regions they are suitable and economical[17], and (iii) the need for the OS to swap entire superpages on and off disk if paging is required. In this paper, we present a mechanism that addresses problems (i) and (iii) directly, and by changing the economics of using superpages, reduces the importance of problem (ii) The proposed mechanism ....

....general utilization of superpages, most of which result from the requirement that superpages must map regions of physical memory that are contiguous and aligned. They propose subblock TLBs as a way to mitigate some of the cost of solving these problems in the OS virtual memory system. Romer et al.[17] address the problem of selecting regions that can effectively benefit from mapping via superpages. They propose a mechanism for dynamically promoting regions for mapping with superpages given the costs, especially copying, and potential benefits of the promotion. 6 Conclusions We propose to ....

Romer, T. H., Ohrlich, W. H., Karlin, A. R., and Bershad, B. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture (June 1995), pp. 176--187.

....end to end execution time the reduction in cache misses more than pays for the cost of monitoring and remapping. The next application of dynamic page mapping is to eliminate TLB capacity misses by dynamically adapting the virtual memory page size to match the application s reference pattern [Romer et al. 95] Systems with a fixed page size must trade off TLB performance and physical memory consumption: as the page size increases, TLB coverage improves and miss rates fall, but physical memory usage grows due to internal fragmentation. By using a mix of page sizes it is possible to achieve the best ....

Romer, T. H., Ohlrich, W. H., Karlin, A. R., and Bershad, B. N. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 22nd Annual Symposium on Computer Architecture, pages 176--187, 1995.

.... address performance problems caused by a particular application s needs, such as interprocess communication, synchronization, thread management, networking, virtual memory, and cache management [DBRD91, BRE92, SBC93, Ber93, YBMM94, MB93, Fel92, YTR 87, HC91, MA90, ABLL92, FP93, WB92, RLB94, ROKB95] For example, most improvements in IPC performance have been motivated by database applications or operating system servers. Each change required careful and deliberate modifications of the operating system kernel, making the extension difficult to implement. Moreover, each change intended to ....

Theodore Romer, Wayne Ohlrich, Anna Karlin, and Brian Bershad. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 23rd International Symposium on Computer Architecture, 1995.

No context found.

Ted Romer, Wayne Ohlrich, Anna Karlin, and Brian Bershad. Reducing tlb and memory overhead using online superpage promotion. In Proc. 22nd Int. Symp. on Computer Architecture, pages 176--187, 1995.

....reminded me to trust my instincts. Parts of this thesis have previously been published in somewhat different form. Chapter 3 is based on the paper Reducing TLB and Memory Overhead Using Online Superpage Promotion published in the Proceedings of the 22nd Annual Symposium on Computer Architecture [Romer et al. 95] Chapter 4 is based on the paper Dynamic Page Mapping Policies for Cache Conflict Resolution on Standard Hardware published in the Proceedings of the 1st USENIX Symposium on Operating System Design and Implementation [Bershad et al. 94] Chapter 5 is based on the paper Avoiding Cache Misses ....

T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. N. Bershad. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proceedings of the 22nd Annual Symposium on Computer Architecture, pages 176--187. IEEE, June 1995. 142

....pages and multi page transfers are needed to amortize the cost. Second, the combination of relatively small TLBs and large physical memories on current machines causes performance degradation due to insufficient TLB coverage. TLB coverage is increased by large page sizes or superpage mechanisms [20, 19, 16]; e.g. the DEC Alpha supports page sizes from 8KB to 1MB, the SUN UltraSPARC supports page sizes from 8KB to 4MB, and the MIPS R10000 supports page sizes from 4KB to 16MB. Unfortunately, the latency characteristics of high speed networks are at odds with this trend. Recent research has succeeded ....

Ted Romer, Wayne Ohlrich, Anna Karlin, and Brian Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proc. of the 22nd Annual Int. Symp. on Computer Architecture, June 1995.

No context found.

T. H. Romer, W. H. Ohlrich, A. R. Karlin, and B. Bershad. Reducing TLB and memory overhead using online superpage promotion. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, Santa Margherita, Italy, June 1995.

No context found.

Ted Romer, Wayne Ohlrich, Anna Karlin, Brian Bershad. Reducing TLB and Memory Overhead Using Online Superpage Promotion. In Proc. of the 22nd Annual International Symposium on Computer Architecture, pages 176--187, June 1995.

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