| B. E. Jonsson, `Design of Power Supply Lines in High-Performance SI and Current-Mode Circuits', Proc. of 15th NORCHIP Conf., Tallinn, Estonia, pp. 245250, Nov. 1997, IEEE. |
....inverters are added in Fig. 2 b. The inverters restore logic levels for the digital output d, and the latch ensures a stable output for at least one half of a clock period. A number of current comparators have been proposed in the literature, e.g. 9 11] A more elaborate treatment is found in [12]. a) b) i in v out C g1 C g2 M1 M2 d f i in v out d f M1 M2 M3 M4 Fig. 2.4 Current comparators. a) CMOS inverter. b) Trff comparator. 2.1.5 D A converters Current mode D A converters (DACs) can be used as stand alone components or building blocks in A D converters or ....
....IEEE. 10] A. T. K. Tang, and C. Toumazou, High Performance CMOS Current Comparator , Electron. Lett. Vol. 30, No. 1, pp. 5 6, Jan. 1994. 11] G. Palmisano, and G. Palumbo, Offset Compensation Technique for CMOS Current Comparators , Electron. Lett. Vol. 30, No. 11, pp. 852 854, May 1994. [12] A. Rodrguez Vzquez, R. Domnguez Castro, F. Medeiro, and M. DelgadoRestituto, High Resolution CMOS Current Comparators: Design and Applications to Current Mode Function Generation , Analog Integrated Circuits and Signal Processing, Vol. 7, No. 2, pp. 149 165, Mar. 1995. 13] N. C. Battersby, ....
[Article contains additional citation context not shown here]
B. E. Jonsson, `Design of Power Supply Lines in High-Performance SI and Current-Mode Circuits', Proc. of 15th NORCHIP Conf., Tallinn, Estonia, pp. 245250, Nov. 1997, IEEE.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC