H. Eberle amd C.P. Thacker. A 1 Gbit/second GaAs DES chip. In Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, pages 19.7/1--4, New York, NY, USA, 1992. IEEE, IEEE. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
High Speed FPGA Architectures for the Data Encryption Standard - Kaps (1998) (2 citations) (Correct)
....not employ this approach in our design, as modern FPGA synthesizing tools optimize the low level logic themselves. The data rate of the implementation was not mentioned. 2.2 Current Implementations Modern custom hardware implementations can achieve data rates of 1 Gbit sec and beyond. Reference [2] was the first report of a custom chip, employing modern Gallium Arsenide technology to achieve 1 Gbit sec. In a later publication of the same research group [5] they describe this design in more detail. They also mention that the fasted chip they tested could run at 1.4 Gbit sec. One major ....
H. Eberle amd C.P. Thacker. A 1 Gbit/second GaAs DES chip. In Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, pages 19.7/1--4, New York, NY, USA, 1992. IEEE, IEEE.
Authentication in Distributed Systems: Theory and Practice - Lampson, Abadi, Burrows.. (1992) (220 citations) (Correct)
....speeds of .5 MIPS for an 8 Mhz Intel 286 and 9 MIPS for a 20 MHz Sparc. Table I. Speeds of Cryptographic Operations 8 Hardware, bits sec Software, bits sec MIPS Notes RSA encrypt 220 K [25] 5 K [6] 500 bit modulus RSA decrypt 32 K [ 6 ] Exponent=3 MD4 1300 K [22] DES 1. 2 G [11] 400 K [6] Software uses a 64 KB table per key Lampson et al., Authentication in Distributed Systems 14 times essential to the functioning of a practical protocol. A key identifier K r for a receiver R might be any one of: an index into a table of keys that R maintains, ....
EBERLE, H. AND THACKER, C. A 1 Gbit/second GaAs DES chip. In Proceedings of the IEEE 1992 Custom Integrated Circuit Conference (Boston, Mass., May 1992), pp. 19.7.1-19.7.4.
Architectural Considerations for Cryptanalytic Hardware - Goldberg, Wagner (1996) (4 citations) (Correct)
.... could break DES in 9 days with technology forecasted to be available by 1995 [18] Another more recent estimate took advantage of an extremely fast DES chip (designed for normal cryptographic use, not cryptanalysis) concluding that a 1 million assembly could search the DES key space in 8 days [31, 13, 14]. Yet another study examined the feasibility of using existing general purpose content addressable processors, and concluded that a DES keysearch would take 30 days on them with a 1 million investment [30] Even more writing on the subject of hardware DES keysearch can be found in [25] and some ....
H. Eberle and C. P. Thacker. A 1 Gbit/second GaAs DES chip. In Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, pages 19.7/1--4. IEEE, May 1992.
Fast DES Implementations for FPGAs and its Application to a.. - Kaps, Paar (7 citations) (Correct)
....in 1.2 days, each DESB chip can test 5333 million keys per second. This number appears to be very high. The estimated cost including overhead is only 2500 which appears to be very low to us. Modern custom hardware implementations of DES can achieve data rates of 1 Gbit sec and beyond. References [4, 3] were the first report of a custom chip employing modern GaAs technology to achieve 1 Gbit sec. This design as well as many commercially available devices do not support a key change at full speed; i.e. a different key for every block of plain text. The first paper to show an implementation of ....
H. Eberle and C.P. Thacker. A 1 Gbit/second GaAs DES chip. In Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, pages 19.7/1--4, New York, NY, USA, 1992. IEEE, IEEE.
Authentication in Distributed Systems: Theory and Practice - Lampson, Abadi, Burrows.. (1992) (220 citations) (Correct)
....used in this way. Lampson et al., Authentication in Distributed Systems 13 Table I. Speeds of Cryptographic Operations 8 Hardware, bits sec Software, bits sec MIPS Notes RSA encrypt 220 K [25] 5 K [6] 500 bit modulus RSA decrypt 32 K [6] Exponent=3 MD4 1300 K [22] DES 1. 2 G [11] 400 K [6] Software uses a 64 KB table per key encryption algorithm. From the existence of the bits Encrypt (K 1 , s) anyone who knows K can infer K says s, so we tend to identify the bits and the statement; of course for the purposes of reasoning we use only the latter. We often call such a ....
EBERLE , H. AND THACKER , C. A 1 Gbit/second GaAs DES chip. In Proceedings of the IEEE 1992 Custom Integrated Circuit Conference (Boston, Mass., May 1992), pp. 19.7.1-19.7.4.
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