P.F.A. Middelhoek, S.P. Rajan. From VHDL to Efficient and First-Time-Right Designs: A Formal Approach. ACM Transactions on Design Automation of Electronic Systems, Vol.1, 1996, 205-220.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....changing the order of operations. 2) Data Path Oriented Transformations include vertex merger transformation and the constant merger (3) Control Oriented Transformations include the control merger, and condition signal grouping merger transformations. TRADES (Transformational Design System) [15, 16] is a design methodology based on the designerdriven application of small, local, behavior preserving design transformations, which include optimization transformation, refinement transformation, space time transformation (deals with area delay trade offs) composite transformation, etc. It is the ....

P.F.A. Middelhoek, S.P. Rajan. From VHDL to Efficient and First-Time-Right Designs: A Formal Approach. ACM Transactions on Design Automation of Electronic Systems, Vol.1, 1996, 205-220.

....of operations. 2) Data Path Oriented Transformations include vertex merger transformation and the constant merger transformation. 6 (3) Control Oriented Transformations include the control merger, and condition signal grouping merger transformations. TRADES (Transformational Design System) [15, 16] is a design methodology based on the designerdriven application of small, local, behavior preserving design transformations, which include optimization transformation, refinement transformation, space time transformation (deals with area delay tradeoffs) composite transformation, etc. It is the ....

P.F.A. Middelhoek, S.P. Rajan. From VHDL to Efficient and First-Time-Right Designs: A Formal Approach. ACM Transactions on Design Automation of Electronic Systems, Vol. 1, 1996, p. 205-220.

....derivation; it refers to a class of synthesis techniques wherein an RTL design is derived by applying a sequence of behavior preserving transformations to an initial design representation. A variety of transformational derivation systems have been proposed; DDD [2] T Ruby [3] Veritas [4] TRADES [5] and HASH [6] to name a few. The work presented here establishes the formal foundation on which a transformational derivation system using a core set of uninterpreted RTL transformations can be based. Starting from a minimal model for RTL designs we formally specified in in the Prototype ....

P. Middelhoek and S. Rajan. From VHDL to Efficient and First-Time Right Designs: A Formal Approach. ACM Transactions on Design Automation of Electronic Systems, 1(2):205-- 250, April 1996.

....function definitions, using correctness preserving functional algebraic transformations. Since then several techniques This work was partially supported by the DARPA and monitored by the FBI, under contract number J FBI 93 116. Ph: 513) 556 4784, Ranga.Vemuri UC.EDU 2 have been proposed [7,9,13,17,20,24] wherein a specification could be interactively refined into an implementation employing formal logic. Another approach to formal synthesis is to tightly integrate a formal verification engine with a conventional synthesis flow so that the output of each task in synthesis is formally verified thus ....

P.F.A. Middelhoek and S.P. Rajan. "From VHDL to Efficient and First-Time Right Designs: A Formal Approach". In ACM Transactions on Design Automation of Electronic Systems, volume 1, pages 205--250. ACM, April 1986.

....descriptions from recursive function definitions, using correctness preserving functional algebraic transformations. Since then several techniques have been proposed that attempt to guarantee correct by construction synthesized designs, eliminating the need for a separate verification stage [4, 7, 11, 20]. These techniques employ formal logic and require the user to closely interact with the synthesis tool as the specification is refined into an implementation. Eisenbiegler et al. 1] introduced a general scheme for formally embedding high level synthesis algorithms in HOL [6] High Level ....

P.F.A. Middelhoek and S.P. Rajan. "From VHDL to Efficient and First-Time Right Designs: A Formal Approach". In ACM Transactions on Design Automation of Electronic Systems, volume 1, pages 205--250. ACM, April 1986.

....more evident. Our research tries to facilitate high level synthesis. The current direction in highlevel synthesis is focused towards powerful algorithms to solve a particular problem. In our transformational design system (TRADES) the user provides solutions to the optimization problem. TRADES [1][2] is based on a control data flow graph called SIL. The design system contains many pre proven behavior preserving transformations. A designer can select which transformations are to be applied where in a graph. Since each transformation is behavior preserving the design is correct by ....

P.F.A. Middelhoek and S.P. Rajan, "From VHDL to efficient and first-time-right designs: A formal approach," ACM Transactions on Design Automation of Electronic Systems (TODAES), Apr. 1996.

....to the synthesis of digital hardware software systems with a focus on transformation based methods. 1.3 Context The work described in this thesis does not stand by it self. The transformational design methodology developed and implemented in the TRADES (TRAnsformational DEsign System) [MHM96, Mid93, Mid94a, Mid94b, Mid95, MiR96, MMM95] design environment strongly depends on the development of a powerful internal design representation [Klo92, Klo93, KMN92] and accompanying formal semantics [Hui93, Hui94, HuK94] This design representation was developed in an earlier phase of the TRADES project. Design transformations on this ....

....internal design representation [Klo92, Klo93, KMN92] and accompanying formal semantics [Hui93, Hui94, HuK94] This design representation was developed in an earlier phase of the TRADES project. Design transformations on this design representation have to be defined [EMH93, Eng93] and verified [MiR96, Pra96, Raj95a, Raj95b]. Furthermore, a novel transparent translation method for the translation of (behavioral) VHDL [MMH95, MMM96, MME96] to this internal representation is needed in order to support industrial use. To evaluate the methodology real world industrial design examples are required for which previous ....

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P.F.A. Middelhoek, S.P. Rajan, From VHDL to Efficient and First-Time-Right Designs: A Formal Approach, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 1, No. 2, pp. 205-250, April 1996.*

....following subsections. The transparent translation of VHDL to SIL and removal of the event mechanism are discussed in Section 5. The construction of architectures from an algorithmic level specification is the topic of Section 6. Figure 2 shows our design methodology as implemented in the TRADES [Mid94a, Mid94b, MMM95, Mid95, MMH95, MiR96, MMM96] system. Behavioral VHDL Transparent Translation CDFG Synthesisable VHDL Transformation Tool Box Automatic Clean Up Interactive Design Binding User VSP Instructions Silage Design Parameter Extraction Transparent Translation Transparent Translation Transparent ....

....correct implementation of a design tool based on correctness by construction requires special attention. The use of small local reusable behavior preserving transformations aids correct implementation. The specification of these transformations can be formally verified, for instance by using PVS [OSR93, SOR93, Raj95a, Raj95b, MiR96]. The correctness of the relatively small amount of code required to implement each of these transformations can be assured by extensive testing, code inspection, and through reverse mapping techniques [Jz95] Our current experience with implementing the design tool TRADES indicates that correct ....

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P.F.A. Middelhoek, S.P. Rajan, From VHDL to Efficient and First-Time-Right Designs: A Formal Approach, accepted for ACM Transactions on Design Automation of Electronic Systems (TODAES), April 1996.*

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