L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. Proc. of the IEEE, Special Issue on Distributed Shared Memory, 87(3):498--507, 1999.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....architecture for parallel computing at a relatively low cost. Software distributed shared memory is sometimes refered to as Shared Virtual Memory (SVM) As mentioned before, SVM su#ers in term of performance from a large amount of communication. Moreover, it also su#ers from false sharing [14] which occurs when multiple processors access di#erent variables co located on the same page and at least one access is a write. This kind of problem occurs in software DSM due to a large granularity of its virtual memory page. In this paper, PEA is implemented using MPICH, a freely available, ....

Iftode, L., Singh, J. P., Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, Special Issue on Distributed Shared Memory, vol. 87, no. 3, pp. 498-507, March 1999.

....architecture for parallel computing at a relatively low cost. Software distributed shared memory is sometimes refered to as Shared Virtual Memory (SVM) As mentioned before, SVM suffers in term of performance from a large amount of commu nication. Moreover, it also suffers from false sharing [14] which occurs when multiple processors access different variables co located on the same page and at least one access is a write. This kind of problem occurs in software DSM due to a large granularity of its virtual memory page. In this paper, PEA is implemented using MPICH, a freely available, ....

Iftode, L., Singh, J.P., Shared Virtual Memory: Progress and Chal- lenges. Proceedings of the IEEE, Special Issue on Distributed Shared Memory, vol. 87, no. 3, pp. 498-507, March 1999. 12

....approaches do not take into consideration the application behavior. Thus, the hardware coherence schemes usually transfer entire blocks of data. Software maintained consistency uses pages as transfer unit. These schemes usually result in fragmentation, false sharing and redundant communication [13]. Few application oriented consistency schemes exist [5, t0] However, these ap proaches use replication and transfer entire objects across address spaces. With our approach we ensure consistency only for the related data across address spaces according to the application behavior. 7 Conclusion ....

L. Iftode and J.P. Singh. Shared virtual memory: Progress and challenges. Proc. of the IEEE, Special Issue on Distributed Shared Memory, 87(3):498-507, 1999.

....that the true owner of a page is always found. Another efficiency issue is the number of forwarding requests needed to find the owner of a page. The benefits of a virtual shared memory are unquestionable. However, its main limitation is performance. The main performance limiting factors are [61]: The large granularity of coherence generates artificial communication since entire pages are transferred between address spaces. False sharing may also occur when individual memory accesses are located in the same page. Fragmentation arises when a requesting processor does not need all the data ....

....Serialization also occurs when two different tasks work on related block tiles. Despite the progress in shared virtual memory, the performance of many applications is lower than that of the hardware coherence systems, especially for irregular applications involving a lot of synchronization [61]. The main guideline for future research is to integrate the application and architectural support with the communication architecture and understand and exploit the interaction among the application, protocol and communication layers rather then keeping some of them fixed. The distributed shared ....

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Liviu Iftode and Jaswinder Pal Singh. Shared virtual memory: Progress and challenges. Proc. of the IEEE, Special Issue on Distributed Shared Memory, 87(3):498-- 507, 1999.

....DSM system is using remote memory to replace local disk, as such the disk access time will be reduced about one order of magnitude. This idea is very similar to that of virtual memory in operating system so that software DSM system is also named shared virtual memory system in many literature[20]. Therefore, supporting large memory is very important, especially for some scientific applications that require large memory support. In addition to support large memory, the system must adapt to heterogeneous, dynamic environment. Thus, a CCNUMA based, hierarchical scheme is proposed, as shown ....

L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. Proc. of the IEEE, Special Issue on Distributed Shared Memory, 87(3):498--507, March 1999.

....coherence unit resides is called its home node. The interrupt cost, associated with receiving a message, for asynchronous protocol processing is the single largest component of the slow remote latency, not the actual wire delay in the network or the software actually implementing the protocol [6] [17]. To our 1 knowledge, the shortest SW DSM read latency to date is that of Shasta [34] The 15 microsecond round trip read latency is roughly divided into 5 microseconds, of real communication and 10 microseconds of interrupt and agent overhead [12] Most other SW DSM implementations have ....

....was independently introduced in Shasta [35] and Blizzard S [38] for use with all types of loads. There are several other systems that use compiler generated checks to implement a global address space (for example, Olden [7] SplitC [9] and Midway [4] Regarding the simple architectural support [17], the GeNIMA proposal is closest to our work [5] 14] GeNIMA pro10 poses a protocol and a general network interface mechanism to avoid some of the asynchronous overhead. A processor starting a synchronous communication event, e.g. the requesting processor initiating some coherence actions, ....

L. Iftode and J. P. Singh. Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, Special Issue on Distributed Shared Memory, 87(3):498--507, March 1999.

....unit resides is called its home node. The interrupt cost, 2 associated with receiving a message, for asynchronous protocol processing is the single largest component of the slow remote latency, not the actual wire delay in the network or the software actually implementing the protocol [BS97] IS99] To our knowledge, the shortest SW DSM read latency to date is that of Shasta [SGA97] The 15 microsecond round trip read latency is roughly divided into 5 microseconds, of real communication and 10 microseconds of interrupt and agent overhead [Gha00] Most other SW DSM implementations have ....

....98] SoftFLASH [ENCH96] and TreadMarks [KCDZ94] Most of them suffer from synchronous interrupt protocol processing. We belive that many of these implementations would benefit from a more efficient protocol implementation; such the one described here. Regarding the simple architectural support [IS99] the GeNIMA proposal is closest to our work. GeNIMA proposes a protocol and a general network interface mechanism to avoid some of the asynchronous overhead. A processor starting a synchronous communication event, e.g. the requesting processor initiating some coherence actions, checks for ....

L. Iftode and J. P. Singh. Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, Special Issue on Distributed Shared Memory, 87(3):498--507, March 1999.

.... have considered migrating the coherence protocol, or parts of it, to software [1, 5, 7, 14, 20, 21, 34, 35] Shared virtual memory (SVM) systems go even further by completely supporting the protocol mechanisms at the operating system or application level using the virtual memory system (see, e.g. [23]) We will refer to distributed shared memory systems on which the directory protocol is implemented in software and run on a compute processor as software only directory protocols [5] In hardware only as well as software only directory protocols performance is often limited by processor stall ....

L. Iftode and J. P. Singh, Shared virtual memory: Progress and challenges, Proc. of the IEEE 87, 3 (March 1999), 498#507.

..... 12 4 Performance evaluation 13 5 Conclusion 16 LIP, ENS Lyon, 46 Alle d Italie, F 69364 Lyon Cedex 07, France. Contact: fGabriel. Antoniu, LucBougeg ens lyon.fr. 1 1 Introduction In their traditional flavor, Distributed Shared Memory (DSM) libraries [16, 19, 20, 11] allow a number of separate processes to share a common address space using a consistency protocol according to a semantics specified by some given consistency model: sequential consistency, release consistency, etc. The processes may usually be physically distributed among a number of computing ....

L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. Proceedings of the IEEE, 87(3), March 1999.

....overview 3 3 Specifying protocols in DSM PM2 5 4 Performance evaluation 7 5 Conclusion 10 LIP, ENS Lyon, 46 Alle d Italie, F 69364 Lyon Cedex 07, France. Contact: fGabriel. Antoniu, LucBougeg ens lyon.fr. 1 1 Introduction In their traditional flavor, Distributed Shared Memory (DSM) libraries [7, 10, 11, 4] allow a number of separate processes to share a common address space according to some fixed consistency model: sequential consistency, release consistency, etc. The processes may usually be physically distributed among a number of computing nodes interconnected by some communication library. The ....

L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. Proceedings of the IEEE, 87(3), March 1999.

....clusters. We illustrate its power with figures obtained for different protocols implementing sequential consistency, release consistency and Java consistency, on top of Myrinet, Fast Ethernet and SCI clusters. 1 Introduction In their traditional flavor, Distributed Shared Memory (DSM) libraries [7, 10, 11, 4] allow a number of separate processes to share a common address space according to some fixed consistency model: sequential consistency, release consistency, etc. The processes may usually be physically distributed among a number of computing nodes interconnected by some communication library. The ....

L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. Proceedings of the IEEE, 87(3), March 1999.

....such as write notices. In many home based software DSM systems[14, 10] data information are processed in intermediate approach, that is to be propagated and applied to home eagerly, and fetched by others lazily. However, coherence information are propagated and applied either eagerly or lazily [15]. In lock based cache coherence proto6 N P 3 P 2 P 1 P Interconnection Network Home Home Home . Home Cached Cached Cached Cached Cached Cached Cached Figure 3: Memory organization of JIAJIA. col, coherence information are processed in a similar way to data information, each ....

....messages is not worthwhile with current CPU and network technologies since the main CPU is idle when the message arrives. However, finding an efficient communication mechanism to replace the interrupt or polling is worth studying, and this has been a direction for future research on software DSM[21, 15]. 3. Data miss penalty contributes 11.75 of the whole execution time on average. In other words, 39.17 system overhead is spent on data miss penalty. So finding an efficient way to reduce data miss penalty is the most important thing. Although remote page fetching costs much time, we find the ....

L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. In Proc. of the IEEE, Special Issue on Distributed Shared Memory, Spring 1999.

....such as write notices. In many home based software DSM systems[6, 17] data information is processed in intermediate approach, that is to be propagated and applied to home eagerly, and fetched by others lazily. However, coherence information are 8 propagated and applied either eagerly or lazily [7]. In lock based cache coherence protocol, coherence information are processed in a similar way to data information, each coherence information has a static home according to the corresponding synchronization object ( e.g. lock manager, barrier manager) All coherence information are propagated to ....

L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. In Proc. of the IEEE, Special Issue on Distributed Shared Memory, Spring 1999.

.... to provide supercomputing capabilities at a fraction of the cost of traditional multiprocessor systems [1, 8] At the same time, much research has been conducted in software distributed shared memory (DSM) to make it as easy to program clusters as it is to program shared memory multiprocessors [15, 2, 6, 20, 21, 29, 27, 26, 17]. These advances in programmability and performance are making it possible to use very large clusters as a cost e ective platform for data intensive, long running applications. As cluster size and application running times increase, adding fault tolerance becomes critical. At the same time, to ....

L. Iftode, J. P. Singh. Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, v. 83, no. 3, March 1999.

....in software. Since the unit of coherence is a virtual memory page, false sharing occurs when multiple unrelated shared objects lie on the same page. To alleviate the message trac that would be generated in the presence of false sharing, several relaxed consistency models have been proposed [18, 5, 21, 7, 20]. These consistency models de ne a memory model for programmers in which they agree to exclusively use explicit synchronization. Under this assumption, the coherence protocol can delay the invalidation messages until a synchronization operation is performed, thus reducing both the protocol ....

L. Iftode and J.P. Singh. Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, 87(3):498-507, March 1999.

....implement multiple writer protocols without special network interface support. These protocols use the CPU to compute local updates by determining the di#erence (di#) between a clean and dirty copy of the page that has been written. The protocols di#er in how and when they propagate and merge di#s [14]. Recently, several protocols have been proposed to take advantage of memory mapped communication that supports fine grained remote writes [12, 15, 23] These protocols are all home based Lazy Release Consistency (HLRC) protocols in which each page is assigned a fixed node called home to collect ....

L. Iftode and J.P. Singh. Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, 87(3):498--507, March 1999.

....exclusively on independent checkpointing. In particular, we implement independent checkpointing in the context of a software shared memory system to provide a robust, yet fa3 miliar programming model. In the last decade, an impressive amount of research has been conducted in software shared memory [17, 2, 6, 25, 26, 37, 35, 34, 19], mostly aiming for performance (e.g. relaxed consistency models, lazy protocols and communication hardware support) More recently, projects like InterWeave [36] propose a shared memory programming model to support applications that run on wide area clusters of heterogeneous machines. The speci ....

L. Iftode, J. P. Singh. Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, v. 83, no. 3, March 1999.

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L. Iftode and J. P. Singh. Shared virtual memory: Progress and challenges. Proc. of the IEEE, Special Issue on Distributed Shared Memory, 87(3):498--507, 1999.

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Iftode, L., Singh, J. P., Shared Virtual Memory: Progress and Challenges. Proceedings of the IEEE, Special Issue on Distributed Shared Memory, vol. 87, no. 3, pp. 498-507, March 1999.

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L. Iftode and J.P.Singh. Shared virtual memory: Progress and challenges. Proc. of the IEEE, Special Issue on distributed Shared Memory, 87(3):498--507, 1999.

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