D. G. Elliott and W. M. Snelgrove. "C.RAM: Memory with a Fast SIMD Processor." In Proceedings of the Canadian Conference on VLSI, pages 3.3.1--3.3.6, Ottawa, October 1990. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Computational RAM: The case for SIMD computing in memory - Elliott, al. (1997) (6 citations) (Correct)
....we must avoid making changes to the architecture of the basic memory arrays, the IC process; and constrain die sizes, signal counts and power. Our work on Computational RAM (C. RAM) has been in placing simple and medium complexity SIMD PEs in memory, from 8 Kb of ASIC SRAM to 16 Mb commodity DRAM [1 3]. These chips have run applications and have been shown to be useful in the fields of signal and image processing, computer graphics, CAD, database, and scien1. Further information can be found at: http: www.ee.ualberta.ca elliott cram email: elliott ee.ualberta.ca; tific computing. So far ....
D. G. Elliott and W. M. Snelgrove. "C.RAM: Memory with a Fast SIMD Processor." In Proceedings of the Canadian Conference on VLSI, pages 3.3.1--3.3.6, Ottawa, October 1990.
System Design for a Computational-RAM Logic-In-Memory.. - Nyasulu (1999) (Correct)
....chips, the C64p1k, has been described in more detail because it forms the basis of most of the system prototyping and performance analysis presented in this thesis. Architecture 24 3.1 Architecture 3.1. 1 RAM with SIMD Processors Computational RAM (CRAM) is a SIMD memory hybrid architecture [19], 20] with single bit processing elements (PEs) integrated at the sense amplifiers of a standard RAM. CRAM is designed to improve the speed of executing massively parallel applications by utilizing the high bandwidth available at the sense amplifiers. Typically, the data width at the sense ....
D. G. Elliott and W. M. Snelgrove, "CRAM: Memory with a Fast SIMD Processor", Proceedings of the Canadian Conference on VLSI, pp 3.3.1-3.3.6, October, 1990.
Architecture and Implementation of a Computational RAM.. - Nyasulu, Snelgrove (1998) Self-citation (Snelgrove) (Correct)
....PCI bus transactions to CRAM operations. The controller programming model is also described. A prototype CRAM controller has been implemented in a Xilinx XC4013E 2 FPGA, and is currently being used in building a prototype CRAM system in a PC environment. 1. Introduction Computational RAM [1 2] is a SIMD memory hybrid architecture, with 1 bit processing elements (PE) integrated at the sense amplifiers of a standard DRAM SRAM (Fig. 1a) This architecture improves the performance of highly parallel and computation intensive applications [3 7] by utilizing the high bandwidth at the memory ....
D. G. Elliott and W. M. Snelgrove, "CRAM: Memory with a fast SIMD Processor", Proceedings of the Canadian Conference on VLSI, pp. 3.3.1-3.3.6, May, 1990.
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