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M. Freericks. The nML Machine Description Formalism. Technical report, Forschungsberichte des Fachbereichs Informatik, Technische Universitat Berlin, 1991.

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Performance Estimation For Hardware/Software Codesign.. - Grode, Madsen, Jerraya (1998)   (1 citation)  Self-citation (Technical)   (Correct)

....behavior of microprocessors have been modeled by textual descriptions [1] Such a description was then used to generate a compiler which could successively be used to compile the application onto the processor. Other compilation techniques for embedded systems have emerged in recent years [2, 5, 16]. These so called retargetable compilers have the strength that the processor description is used to generate the compiler on the fly. This makes retargeting (i.e. generating a compiler for a new processor) simpler than in traditional compiler techniques. However, mainly due to two reasons, ....

M. Freericks. The nML Machine Description Formalism. Technical report, Forschungsberichte des Fachbereichs Informatik, Technische Universitat Berlin, 1991.


Design and Implementation of a Partial Evaluation-Based Compiler .. - Freericks (1996)   Self-citation (Freericks)   (Correct)

....The stack is held explicitly, and the arguments that are passed along by each jump or call are modelled via global transfer registers. 9.6 The Future: Automatic Back End Generation A more ambitious approach to machine code generation is the automatic generation of back ends. Languages like nML [43, 44] give a full instruction level register transfer semantics for a target architecture, together with information about the assembly language syntax and bit level code representation. In a framework like CBC [38, 39] such a target description is transformed into a hardware model suited as input ....

M. Freericks, The nML Machine Description Formalism, Forschungsberichte des Fachbereichs Informatik Nr. 91-15, TU Berlin, 1991


Basic Semantics for Computer Arithmetic - Freericks, Fauth, Knoll (1994)   Self-citation (Freericks)   (Correct)

.... primitive operation nodes that have to be matched to the hardware operators available in given hardware architecture. When matching n bit operations to m bit operators, precise notion of the overflow carry behaviour of the target hardware is needed. ffl The nML machine specification language [1][4] defines hardware architectures by their instruction sets. A behavioural instruction set definition is given by listing an execution semantics for each instruction. nML has to provide adequate primitive operations to model machine operators to such a degree of precision that automatic tools can ....

M. Freericks, The nML Machine Description Formalism, Forschungsberichte des Fachbereichs Informatik Nr. 1991/15, Technische Universitat Berlin

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