P. Lysaght, "Dynamically Reconfigurable Logic in Undergraduate Projects", in W. Moore, W. Luk, Eds., FPGAs, Abingdon, England: Abingdon EE&CS Books, pp. 424-436, 1991. Home/Search Document Not in Database Summary Related Articles Check |
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The Roles of FPGAs in Reprogrammable Systems - Hauck (1998) (25 citations) (Correct)
....by the architecture or by the current hardware instantiation) while a run time reconfigured system can have as many configurations as there is storage space to hold them. Because of these advantages there has been a lot of work on run time reconfigurable systems, applications, and support tools [Lysaght91, French93, Eldredge94, Lysaght94b, Koch94a, Razdan94, Ross94, Gokhale95, Hadley95, Jones95, Schoner95, DeHon96, Luk96, Villasenor96, Wittig96] Note that this approach can be taken even further to local run time reconfiguration [Lysaght94a, Singh94, Hutchings95, Brebner95, Lysaght95, Wirthlin95, ....
P. Lysaght, "Dynamically Reconfigurable Logic in Undergraduate Projects", in W. Moore, W. Luk, Eds., FPGAs, Abingdon, England: Abingdon EE&CS Books, pp. 424-436, 1991.
Dynamic Reconfiguration of Field Programmable Gate Arrays - Lysaght, Dunlop (1993) (1 citation) Self-citation (Lysaght) (Correct)
....slightly differently from the meaning ascribed to them in conventional von Neumann environments. Nonetheless, overall performance remains dependent on a high cache hit to miss ratio which, in turn, requires that the principle of locality of reference must apply, Hennessy and Patterson 1990 and Lysaght 1991). 7 The operation of the logic cache optimises the ratio of active logic with respect to silicon area. This is very important for SRAM based FPGAs because of their logic density limitations. Despite the highly regular architectures which make them ideally suited to VLSI fabrication techniques, ....
Lysaght, P., "Dynamically Reconfigurable Logic in Undergraduate Projects" in FPGAs, W. Moore and W. Luk, Eds., Abingdon EE&CS Books, England, 1991.
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